Run-time controller in a functional verification system
AssigneeTharas Systems, Inc.
InventorsSubbu Ganesan, Leonid Alexander Broukhis, Ramesh Narayanaswamy, Ian Michael Nixon
Life of this patent
Estimating the term…
Loading patent…
AssigneeTharas Systems, Inc.
InventorsSubbu Ganesan, Leonid Alexander Broukhis, Ramesh Narayanaswamy, Ian Michael Nixon
Estimating the term…
A run time controller which controls the sequence of evaluations of combinatorial blocks in a functional verification system. A target design is partitioned into multiple clusters, with each cluster in turn containing multiple combinatorial blocks. Evaluation units may be designed to evaluate the combinatorial blocks in each cluster in parallel. The run time controller may contain a flow processor, a flow control memory, and a cluster control memory. The contents of cluster control memory may be configured to specify how different condition bits/registers are to be altered upon evaluation of each cluster. The flow control memory is configured with instructions to data from different sources to be sent the evaluation units. In addition, the instructions are designed to examine the status of different registers and cause the flow processor to alter the evaluation flows.
A functional verification system performing the functional verification of a target design partitioned into a plurality of clusters, each of said clusters containing a plurality of combinatorial blocks, each of said plurality of clusters being uniquely identified by a cluster number, said plurality of clusters together representing said target design, said functional verification system comprising:
Dependencies are inferred from the claim text.