Automatic detection and correction of relatively rearranged and/or inverted data and address signals to shared memory

A method of detecting the existence of inversion of first address lines by which a first data processor accesses a shared memory relative to second address lines by which a second processor accesses the shared memory, said method comprising the steps of:

• writing to the shared memory from the first data processor via the first address lines to each address having a single address bit in a first digital state and all remaining address bits in a second digital state opposite to said first digital state unique data;
• reading from the shared memory to the second data processor via the second address lines from each address having a single address bit in said first digital state and all remaining address bits in said second digital state;
• reading from the shared memory to the second data processor via the second address lines from each address having a single address bit in said first digital state and all remaining address bits in said second digital state for each for each combination of expected inverted first address lines;
• and
• determining inverted first address lines by correlating said read address lines reading said unique data with said write address lines writing said unique data.

A method of detecting the existence of inversion of first data lines by which a first data processor accesses a shared memory relative to second data lines by which a second processor accesses the shared memory, said method comprising the steps of:

• writing to the shared memory from the first data processor via the first data lines to at least one predetermined address a plurality of predetermined data words, a first data word having alternating bits of a first digital state and a second digital state, a second data word having alternating pairs of bits of said first digital state and said second digital state, each subsequent data word having alternating groups of bits of said first digital state and second digital state of twice the number of bits of a prior data word, a last data word having a least significant half of bits of said first digital state and a most significant half of bits of said second digital state;
• reading from the shared memory to the second data processor via the second data lines said plurality of predetermined data words from each of said at least one predetermined address;
• and
• determining rearranged first data lines by correlating a bit value for a particular bit of said plurality of predetermined data words with a first data line.

A method of detecting the existence of inversion of first data lines by which a first data processor accesses a shared memory relative to second data lines by which a second processor accesses the shared memory, said method comprising the steps of:

• writing to the shared memory from the first data processor via the first data lines to each address withing the memory a predetermined data word having all bits in a first digital state;
• reading from the shared memory to the second data processor via the second data lines from each address within the memory;
• and
• determining inverted first data lines by correlating said read data lines reading a second digital state opposite to said first digital state with said write data lines writing corresponding bits of said predetermined data word.