Integrated resistor having aligned body and contact and method for forming the same

An integrated circuit, comprising:

• a semiconductor layer having first and second sides;
• and
• a resistor including,
• a first contact region disposed in the semiconductor layer, contiguous with the first side of the semiconductor layer, and having a first resistivity,
• a body region disposed in the semiconductor layer, contiguous with the first and second sides of the semiconductor layer and with the first contact region, and having a second resistivity that is higher than the first resistivity, and
• a second contact region disposed in the semiconductor layer, contiguous with the second side of the semiconductor layer and with the body region, separated from the first contact region, and having substantially the first resistivity.

A memory circuit, comprising:

• first and second supply terminals;
• semiconductor layers including a resistive layer having a first portion with first and second edges;
• a first bit line disposed in one of the semiconductor layers;
• and a memory cell including,
• a first transistor disposed in one of the semiconductor layers and having a first terminal coupled to the first supply terminal, a second terminal coupled to the second supply terminal, and a control terminal,
• a second transistor disposed in one of the semiconductor layers and having a first terminal coupled to the first supply terminal, a second terminal coupled to the second supply terminal, and a control terminal coupled to the first bit line, and
• a first resistor including,
• a first contact region disposed in the first portion of the resistive layer, contiguous with the first edge of the first portion, having a first resistivity, and coupled to the control terminal of the first transistor,
• a body region disposed in the first portion of the resistive layer, contiguous with the first and second edges of the first portion and with the first contact region, and having a second resistivity that is higher than the first resistivity, and
• a second contact region disposed in the first portion of the resistive layer, contiguous with the second edge of the first portion and with the body region, separated from the first contact region, and having substantially the first resistivity.

An electronic system, comprising:

• a data input device;
• a data output device;
• and
• a computer circuit coupled to the data input and output devices and including a processor and an integrated circuit coupled to the processor, the integrated circuit comprising,
• a semiconductor layer having first and second sides, and
• a resistor that includes,
• a first contact region disposed in the semiconductor layer, contiguous with the first side of the semiconductor layer, and having a first resistivity,
• a body region disposed in the semiconductor layer, contiguous with the first and second sides of the semiconductor layer and with the first contact region, and having a second resistivity that is higher than the first resistivity, and
• a second contact region disposed in the semiconductor layer, contiguous with the second side of the semiconductor layer and with the body region, separated from the first contact region, and having substantially the first resistivity.

A method, comprising:

• forming a first mask on a semiconductor layer;
• doping exposed portions of the masked semiconductor layer;
• forming a second mask on the first mask and on the semiconductor layer;
• and
• removing exposed portions of the first mask and the semiconductor layer.