Semiconductor memory device and data read method thereof

A semiconductor memory device, comprising:

• a memory cell array including a plurality of memory cells;
• a plurality of data IO line pairs connected to a plurality of local data IO line pairs of the memory cell array;
• a plurality of first current sense amplifying means for controlling a loop gain in response to a control signal, and for amplifying and outputting a current difference of each of the plurality of the data IO line pairs;
• and
• a current sense amplifier input impedance detecting and loop gain control signal generating means for detecting an input impedance of the plurality of the first current sense amplifying means to generate the control signal when a read command is applied.

A semiconductor memory device, comprising:

• a plurality of memory cells connected between a plurality of bit line pairs;
• a plurality of sense amplifying means for amplifying data between the plurality of the bit line pairs;
• a plurality of data IO gates for transferring data between the plurality of the bit line pairs and a plurality of local data IO line pairs;
• a plurality of current sense amplifier load means for being connected between the plurality of the local data IO line pairs and the plurality of the data IO line pairs, and applying an electric current to the plurality of the local data IO line pairs and the data IO line pairs when a read command is applied;
• a plurality of first current sense amplifying means for controlling a loop gain in response to a control signal, and amplifying and outputting a current difference of each of the plurality of the data IO line pairs;
• a current sense amplifying input resistance detecting means for generating a detecting voltage to detect an input impedance of the plurality of the first current sense amplifying means when the read command is applied;
• and
• a loop gain control signal generating means for receiving the detecting voltage to generate the control signal when the input impedance is negative.

A data read method of a semiconductor memory device including a plurality of memory cells, the method comprising:

• generating a control signal to control a loop gain of a plurality of current sense amplifiers by detecting a variation of an input impedance of the current sense amplifier when a read command is applied and data are read from the memory cell nearest to the plurality of the current sense amplifiers;
• controlling the loop gain of the plurality of the current sense amplifiers in response to the control signal;
• and
• amplifying a current different of each of a plurality of data IO line pairs by the plurality of the current sense amplifiers to generate a plurality of output signals.