Method of read operation of nonvolatile semiconductor memory and nonvolatile semiconductor memory
AssigneeFujitsu Limited
InventorMitsuteru Iijima
Life of this patent
Estimating the term…
Abstract
Memory cell currents flowing through memory cells in reading data are compared with reference currents that are set in accordance with the wiring widths of word lines connected to these memory cells. The logic levels of data retained in the memory cells are detected depending on whether larger or smaller the memory cell currents are than the reference currents. Setting a plurality of reference currents for every wiring width of word lines allows the reference currents to be set at optimum values for each memory cell having different gate widths. Since the reference currents are set according to the characteristic of memory cells, read margins improve for enhanced reliability in read operations.
Claims23
A method of read operation of a nonvolatile semiconductor memory for reading data retained in nonvolatile memory cells respectively connected to word lines having different wiring widths from each other, the method comprising the step of
- comparing memory cell currents flowing through said memory cells during the data readout with reference currents according to the wiring widths of said word lines, and detecting the logic levels of data retained in said memory cells.
A method of read operation of a nonvolatile semiconductor memory for reading data retained in first and second memory cells which are nonvolatile and respectively connected to first and second word lines having different wiring widths from each other, the method comprising the steps of:
- in reading data from said first memory cell, comparing a memory cell current flowing through said first memory cell with a first reference current and detecting the logic level of data retained in said first memory cell;
- and
- in reading data from said second memory cell, comparing a memory cell current flowing through said second memory cell with a second reference current different from said first reference current and detecting the logic level of data retained in said second memory cell.
A method of read operation of a nonvolatile semiconductor memory for reading data retained in first and second memory cells which are nonvolatile and respectively connected to first and second word lines having different wiring widths from each other, the method comprising the steps of:
- in reading data from said first memory cell, supplying a first voltage to said first word line, comparing a memory cell current flowing through said first memory cell with a reference current, and detecting the logic level of data retained in said first memory cell;
- and
- in reading data from said second memory cell, supplying said second word line with a second voltage different in value from said first voltage, comparing a memory cell current flowing through said second memory cell with said reference current, and detecting the logic level of data retained in said second memory cell.
A method of read operation of a nonvolatile semiconductor memory for reading multileveled data retained in a pair of first and second memory cells which are nonvolatile and respectively connected to first and second word lines having different wiring widths from each other, the method comprising the step of
- in reading data from said first and second memory cells, comparing memory cell currents flowing through said first and second memory cells with each of a plurality of reference currents and detecting the logic level of the multileveled data.
A nonvolatile semiconductor memory comprising:
- first memory cell(s) and second memory cell(s) being nonvolatile;
- first word line(s) connected to control gate(s) of said first memory cell(s);
- and
- second word line(s) connected to control gate(s) of said second memory cell(s) and having a wiring width different from that of said first word line(s), wherein:
- in reading data from said first memory cell, a memory cell current flowing through said first memory cell is compared with a first reference current, and the logic level of data retained in said first memory cell is detected;
- and
- in reading data from said second memory cell, a memory cell current flowing through said second memory cell is compared with a second reference current different from said first reference current, and the logic level of data retained in said second memory cell is detected.
A nonvolatile semiconductor memory comprising:
- first memory cell(s) and second memory cell(s) being nonvolatile;
- first word line(s) connected to control gate(s) of said first memory cell(s) and supplied with a first voltage during selection of said first memory cell(s);
- and
- second word line(s) connected to control gate(s) of said second memory cell(s) and supplied with a second voltage different from said first voltage during selection of said second memory cell(s), the second word line(s) having a wiring width different from that of said first word line(s), wherein
- in reading data from either of said first memory cell and said second memory cell, a memory cell current flowing through the memory cell with data read is compared with a reference current, and the logic level of data retained in the memory cell with data read is detected.
A nonvolatile semiconductor memory comprising:
- first memory cell(s) and second memory cell(s) being nonvolatile;
- first word line(s) connected to control gate(s) of said first memory cell(s);
- and
- second word line(s) connected to control gate(s) of said second memory cell(s) and having a wiring width different from that of said first word line(s), wherein:
- multileveled data is retained in a pair of said first and second memory cells;
- and
- in reading the multileveled data from said first and second memory cells, memory cell currents flowing through said first and second memory cells are compared with a plurality of reference currents, and the logic level of the multileveled data is detected.
Dependencies are inferred from the claim text.