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US 2002/0118178 A1Published application
Keypad scanner with serial input and output
OwnerMairtin P. O'Conghaile, Tadhg Creedoninventors
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Abstract
A key pad scanner having a shift register driving the column lines and a parallel-in serial-out register coupled to the row lines of the keypad Each scanning cycle comprises a multiplicity of sub-cycles in of which serial data signals for the shift register identify a single respective one of the column lines The scanner may be coupled to an ASIC entirely by serial data signals
Claims6
A keypad scanner for a keypad comprising a multiplicity of rows and columns and an array of keys each operative to couple a respective column line and a respective row line. said scanner comprising
- (a) a shift register having a multiplicity of stages each associated with a respective column line.
- (b) a parallel-in. serial-out (PISO) register having a multiplicity of stages each coupled to a respective row line.
- (c) means for applying to said shift register a scanning cycle comprising a multiplicity of sub-cycles. each comprising serial data signals identifying in each sub-cycle a single one of the column lines.
- (d) means for loading said PISO register after said serial data signals in each sub-cycle with row data corresponding to signal values on the row lines. and
- (e) means for shifting out serially the row data held in said PISO register
2 more elements
A keypad scanning system comprising
- (i) a keypad comprising a multiplicity of rows and columns and an array of keys each operative to couple a respective column line and a respective row line.
- (ii) a keypad scanner comprising
- (a) a shift register having a multiplicity of stages each associated with a respective column line.
- (b) a parallel-in. serial-out (PISO) register having a multiplicity of stages each coupled to a respective row line.
- (c) means for applying to said shift register a scanning cycle comprising a multiplicity of sub-cycles. each comprising serial data signals identifying in each sub-cycle a single one of the column lines.
- (d) means for loading said PISO register after said serial data signals in each sub-cycle with row data corresponding to signal values on the row lines. and
- (e) means for shifting out serially the row data held in said PISO register. and
- (iii) an application-specific integrated circuit including
- means for generating a clock signal for said registers.
- a serial shift-out block responsive to said clock signal to generate said scanning cycle in serial form.
- a serial shift-in block responsive to said clock signal for receiving said row data in said PISO register in serial form.
- a data controller responsive to said clock signal to control said serial shift-out block. said data controller initiating a new column scan value on completion of a recycling count. and
- means responsive to said data controller and said serial shift-in block to latch said row data.
10 more elements
Dependencies are inferred from the claim text.