Parallel time interleaved delta sigma modulator

A time interleaved delta sigma modulator analog to digital converter comprising:

• a multiplexer having a plurality of multiplexer inputs, a multiplexer output, and a multiplexer input control, said multiplexer input control arranged to couple a select one of said plurality of multiplexer inputs to said multiplexer output;
• a sample frequency clock operating at a predetermined sample frequency having a sample frequency period;
• a plurality of modulators, each of said plurality of modulators having a modulator input, a clock input, and a modulator output, wherein:
• each modulator input is coupled in parallel to an analog input signal;
• each clock input is coupled to a clock signal that operates at said predetermined sample frequency and is time phase shifted such that each of said plurality of modulators samples said analog input signal once within said sample frequency period in a time interleaved manner;
• and,
• each modulator output is coupled to a respective one of said plurality of multiplexer inputs;
• and,
• at least one control signal coupled to said multiplexer input control arranged to select each of said multiplexer inputs once within every sample frequency period.

A time interleaved delta sigma modulator analog to digital converter comprising:

• a multiplexer having a plurality of multiplexer inputs, a multiplexer output, and a multiplexer input control, said multiplexer input control arranged to couple a select one of said plurality of multiplexer inputs to said multiplexer output;
• a plurality of modulators, each of said plurality of modulators having a modulator input, a clock input, and a modulator output, wherein:
• each modulator input is coupled in parallel to an analog input signal;
• each clock input is coupled to a clock signal that operates at a predetermined sample frequency and is time phase shifted such that each of said plurality of modulators samples said analog input signal at a different time;
• and,
• each modulator output is coupled to a respective one of said plurality of multiplexer inputs;
• at least one control signal coupled to said multiplexer input control and arranged to select each one of said plurality of multiplexer inputs once every cycle of said predetermined sample frequency, wherein said at least one control signal is synchronized with said clock signals coupled to said clock inputs of said plurality of modulators;
• and,
• a bandpass filter coupled to said multiplexer output having a center frequency less than a frequency defined by the product of said sample frequency and the quantity of said plurality of modulators divided by two.