Method and apparatus for open-loop input offset adjustment in a differential amplifier
AssigneeNational Semiconductor Corporation
InventorJeromy R. Gray
Life of this patent
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AssigneeNational Semiconductor Corporation
InventorJeromy R. Gray
Estimating the term…
An open loop offset trim system for use with a differential amplifier includes a reference generator, an offset detector and a trim circuit. To reduce offset, the differential amplifier is placed in an open loop configuration, with both input terminals connected to receive a common reference signal from the reference generator. In response to an offset, the differential amplifier's output signal will essentially rail to either the supply voltage or the ground. In response to the logic level of the differential amplifier's output signal, the offset detector provides a control signal to the trim circuit to adjust the current conducted by one leg of the differential pair to reduce current mismatch in the legs of the differential pair. This process may be performed iteratively to control the trim circuit to incrementally adjust the current conducted by a leg of the differential pair during the trimming process.
A circuit for adjusting input offset in a differential amplifier having a differential pair circuit having a plurality of input transistors and a plurality of current paths associated with the plurality of input transistors, circuit method comprising:
A circuit for adjusting input offset in a differential amplifier having a differential pair circuit having a plurality of input transistors and a plurality of current paths associated with the plurality of input transistors, circuit method comprising:
A method for adjusting an offset of a differential amplifier having a differential pair circuit having a plurality of input transistors and a plurality of current paths associated with the plurality of input transistors, the method comprising:
An apparatus for adjusting an offset of a differential amplifier having a differential pair circuit having a plurality of input transistors and a plurality of current paths associated with the plurality of input transistors, the method comprising:
Dependencies are inferred from the claim text.