Method of forming semiconductor device having contact pad on source/drain region in peripheral circuit area

A method for forming a semiconductor device, comprising:

• (a) forming isolation layers for defining a memory cell area and a peripheral circuit area on a semiconductor substrate and isolating each device;
• (b) forming a first conductive type transistor in the memory cell area and a first conductive type transistor and a second conductive type transistor in the peripheral circuit area by forming source/drain regions and gate electrodes having sidewall spacers, and first etch stopping layers in the memory cell area and the peripheral circuit area of the semiconductor substrate;
• (c) forming conductive epitaxial layers, which extend from the source/drain regions onto the isolation layers, on the respective source/drain regions;
• (d) forming an interlayer insulating layer overlying the transistors and the conductive epitaxial layers;
• (e) forming plugs by patterning the interlayer insulating layer, opening the source/drain regions of the transistors in the memory cell area and the peripheral circuit area, and filling the openings with metal;
• and
• (f) concurrently forming metal contact pads in the memory cell area and the peripheral circuit area.

A method of forming a semiconductor device having metal contact pads on source/drain regions of transistors in a peripheral circuit area for writing and reading data in memory cells on a semiconductor substrate, the method comprising:

• (a) forming first and second gate electrodes having sidewall spacers and etch stopping layers in the peripheral circuit area;
• (b) forming an interlayer insulating layer overlying the first and second gate electrodes;
• (c) forming first and second conductive type transistors by forming an opening in portions of the interlayer insulating layer on the active area including the first and second gate electrodes, implanting first and second conductive type impurities into the opening, and forming source/drain regions;
• (d) forming a metal layer in the opening;
• and
• (e) forming metal contact pads by node-separating the metal layer.

A method of forming a semiconductor device including a memory cell area having a plurality of memory cells and a peripheral circuit area for writing and reading data in the memory cells in the memory cell area of a semiconductor substrate, the method comprising:

• (a) forming isolation layers for defining a memory cell area and a peripheral circuit area on the semiconductor substrate and isolating each device;
• (b) forming a first conductive type transistor in the memory cell area and a first conductive type transistor and a second conductive type transistor in the peripheral circuit area by forming source/drain regions and gate electrodes having sidewall spacers, and first etch stopping layers in the memory cell area and the peripheral circuit area of the semiconductor substrate;
• (c) forming a first insulating layer overlying the transistors;
• (d) forming plugs by patterning the insulating layer, forming openings in the source/drain regions of the transistors in the memory cell area and the peripheral circuit area, and filling the openings with a conductive material;
• (e) forming contact pads on the source/drain regions in the memory cell area and the source/drain regions in the peripheral circuit area, concurrently by etching the first insulating layer and the plugs and then node-separating the plugs;
• (f) forming a second insulating layer on the contact pads;
• and
• (g) forming a contact plug on at least one contact pad.