Device and method to carry out a viterbi-algorithm

An apparatus for executing a Viterbi algorithm,

• having a number of initial state registers, in each of which a state metric of an initial state of a trellis can be stored,
• having at least one transition register, in which a transition metric of the trellis can be stored,
• having an adder/subtracter network, which is connected to the initial state registers, to the transition register and to evaluation units in accordance with a butterfly structure of the trellis,
• having a number of evaluation units, in which the signals processed by the adder/subtracter network can be evaluated in accordance with the Viterbi algorithm,
• having a selection unit in which the apparatus can be switched between a first operating mode and a second operating mode,
• having a number of final state registers which are coupled to the evaluation units and in each of which a state metric of a respective final state of the trellis can be stored, and
• in which different evaluation units can be selected using the selection unit depending on the selected operating mode.