Reducing copper line resistivity by smoothing trench and via sidewalls
AssigneeTexas Instruments Incorporated
InventorQing-Tang Jiang
Life of this patent
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Abstract
A method of fabricating an integrated circuit. A thin liner (110, 210, 310) is deposited over dielectric layer including within a trench (108) and/or via (106). The thin liner (110, 210, 310) smoothes the sidewalls of the trench (108) and/or via (106) and reduces resistivity. The thin liner may comprise an organic or inorganic dielectric (110) or metal (210,310). A copper interconnect structure (116, 216, 316) is then formed over the thin liner (110, 210, 310).
Claims18
A method of fabricating an integrated circuit, comprising the steps of:
- forming a dielectric layer over a semiconductor body;
- etching a hole in said dielectric layer, wherein sidewalls of said hole have a rough surface;
- depositing a thin liner over said dielectric layer including within said hole;
- depositing a barrier layer over said thin liner;
- forming a copper interconnect structure in said hole after the steps of depositing the thin liner and depositing the barrier layer.
A method of fabricating an integrated circuit, comprising the steps of:
- forming a interlevel dielectric layer over a semiconductor body;
- forming an intrametal dielectric layer over said interlevel dielectric layer;
- etching a trench in said intrametal dielectric layer and a via in said interlevel dielectric layer;
- depositing a thin liner over said intrametal dielectric layer including within said trench and said via;
- directionally etching said thin liner in a horizontal direction to remove said thin liner from a bottom of said via;
- depositing a barrier layer over said thin liner,
- forming a copper interconnect structure in said trench and said via after the steps of depositing the thin liner and depositing the barrier layer.
A method of fabricating an integrated circuit, comprising the steps of:
- forming a dielectric layer over a semiconductor body;
- etching a hole in said dielectric layer, wherein sidewalls of said hole have a rough surface;
- depositing a thin metal liner over said dielectric layer including within said hole to smooth sidewalls of said hole;
- depositing a barrier layer over said thin metal liner;
- depositing a copper seed layer on said barrier layer;
- filling said hole with copper, and chemically-mechanically polishing said copper, barrier layer, and thin metal liner.
Dependencies are inferred from the claim text.