Clock signal generating circuit using variable delay circuit

A phase comparator comprising:

• differential input means including first transistors having an input clock signal applied to their gates and second transistors having a reference voltage signal applied to their gates for outputting a voltage indicative of a difference between said input clock signal and reference voltage signal;
• first switching transistors connected in series with said first transistors for receiving at their gates an internal clock signal for comparison with said input clock signal;
• and
• second switching transistors connected in series with said second switching transistors for receiving at their gates said internal clock signal.

A signal generating circuit comprising:

• an input circuit for amplifying an input signal;
• a first variable delay circuit for delaying an output signal of said input circuit;
• a second variable delay circuit for delaying an output signal of said first variable delay circuit by one of first and second durations;
• a phase comparator circuit for finding a phase difference between the input signal and an output signal of said second variable delay circuit;
• and
• control means for controlling said second variable delay circuit to cause a delay time of said second variable delay circuit to switch between said first and second durations and also for controlling said first and second variable delay circuits to cause a phase of the input signal to always coincide with a phase of the output signal of said second variable delay circuit on the basis of an output of said phase comparator circuit.

A variable delay circuit comprising an integrated current control part and an integrating circuit part for integrating a current supplied from said integrated current control part on the basis of an input clock signal for generating an output clock signal corresponding to a delay of said input clock signal, wherein said integrating circuit part includes:

• driving transistors for receiving the current from said integrated current control part;
• capacitive means for storing therein electric charge by said driving transistors;
• and
• gate potential correcting means connected to gates of said driving transistors and having a capacitance corresponding substantially to one of capacities between gates and sources of said driving transistors and between gates and drains thereof, for changing a gate potential of said driving transistors in an opposite direction in response to a change in a potential at a junction point between said driving transistors and capacitive means.