Semiconductor device with improved metal interconnection and method for forming the metal interconnection

A semiconductor device comprising:

• a substrate including a plurality of conductive areas therein;
• an interlevel dielectric (ILD) film having a polished surface, the ILD film covering the substrate and having a via hole through which one of the plurality of the conductive areas is exposed and having a trench with a smaller depth than the via hole;
• an insulating spacer formed on sidewalls of the trench;
• and
• a metal interconnection formed in the via hole and on the insulating spacer in the trench.

A method of forming of a semiconductor device, comprising:

• preparing a semiconductor substrate including a plurality of conductive areas therein;
• forming an interlevel dielectric (ILD) film having a polished surface, on the semiconductor substrate;
• etching a portion of the ILD film a depth to form a trench, wherein a selected one of the plurality of conductive areas is not located under the portion of the ILD film;
• forming an anti-short insulating layer on the ILD film and in the trench;
• etching the anti-short insulating layer and the ILD film to form a via hole through which the selected conductive area is exposed;
• and
• forming a metal interconnection in the trench and the via hole.

A method of forming a semiconductor device, comprising:

• preparing a semiconductor substrate including a plurality of conductive areas therein;
• forming an interlevel dielectric (ILD) film having a polished surface, on the semiconductor substrate;
• etching a portion of the ILD film a depth to form a trench, wherein a selected one of the plurality of conductive areas is not located under the portion of the ILD film;
• forming an anti-short insulating layer on the ILD film and in the trench;
• etching the anti-short insulating layer to expose the ILD film and so that the anti-short insulating layer remains as a spacer only on sidewalls of the trench;
• etching the ILD film to form a via hole through which the selected conductive area is exposed;
• and
• forming a metal interconnection in the trench and the via hole.