Split buried layer for high voltage LDMOS transistor

In a high voltage lateral double-diffused metal-oxide-semiconductor transistor with a buried layer formed on a semiconductor substrate, said transistor having a drain, a source, a gate channel between said drain and source, a gate for control of said gate channel, and a drift region between said drain and gate channel, said buried layer formed between said drift region and substrate, an improvement comprising:

• at least one field trap formed at a surface of said buried layer adjoining to said drift region.

A method of forming a buried layer for a high voltage lateral double-diffused metal-oxide-semiconductor transistor on a semiconductor substrate comprising the following steps of:

• forming a non-uniform heavily doped region on said substrate;
• and
• driving said heavily doped region to form a split structure.

A method of forming a buried layer for a high voltage lateral double-diffused metal-oxide-semiconductor transistor on a semiconductor substrate comprising the following steps of:

• forming a trench on a surface of said substrate;
• and
• heavily doping said trench and said surface of said substrate.

A method of forming a buried layer for a high voltage lateral double-diffused metal-oxide-semiconductor transistor on a semiconductor substrate comprising the following steps of:

• forming a uniform heavily doped region on a surface of said substrate;
• and
• selectively etching said heavily doped region to form a recess.

A method of forming a buried layer for a high voltage lateral double-diffused metal-oxide-semiconductor transistor on a semiconductor substrate comprising the following steps of:

• forming a uniform heavily doped region of a first conductivity type on said substrate;
• and
• doping a surface of said heavily doped region with a second conductivity type opposite to said first conductivity type to locally decrease doping concentration of said first conductivity type on said surface of said heavily doped region.