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US 2002/0053688 A1Published application
Semiconductor raised source-drain structure
AssigneeMicron Technology, Inc.
InventorsFernando Gonzalez, Chandra Mouli
Life of this patent
Estimating the term…
Abstract
A semiconductor structure which includes a raised source and a raised drain. The structure also includes a gate located between the source and drains. The gate defines a first gap between the gate and the source and a second gap between the gate and the drain.
Claims97
A semiconductor structure, comprising:
- a raised source;
- a raised drain;
- and
- a gate located between said source and said drain, said gate defining a first gap between said gate and said source, and said gate defining a second gap between said gate and said drain.
1 more element
A semiconductor structure formed on a substrate assembly, comprising:
- a raised source;
- a raised drain;
- a gate located between said source and said drain, said gate defining a first gap between said gate and said source, and said gate defining a second gap between said gate and said drain;
- a first junction area located in the substrate assembly beneath said first gap;
- and
- a second junction area located in the substrate assembly beneath said second gap.
3 more elements
A transistor formed on a substrate assembly, comprising:
- a gate structure;
- a raised drain structure;
- a raised source structure;
- a first junction area in the substrate assembly between said gate structure and said raised drain structure, said first junction area extending beneath said gate structure and said raised drain structure;
- and
- a second junction area in the substrate assembly between said gate structure and said raised source structure, said second junction extending beneath said gate structure and said raised source structure.
3 more elements
A transistor, comprising:
- a gate;
- a raised drain;
- a raised source;
- first means for reducing the capacitance between said gate and said raised drain;
- and
- second means for reducing the capacitance between said gate and said raised source.
3 more elements
A transistor, comprising:
- a gate structure;
- a raised drain structure;
- a raised source structure;
- first means for providing a conductive path between said gate structure and said raised drain structure;
- and
- second means for providing a conductive path between said gate structure and said raised source structure.
3 more elements
A semiconductor structure located on a substrate assembly, comprising:
- a gate structure;
- a raised drain structure located adjacent said gate structure, said raised drain structure defining a gap located between said gate structure and said raised drain structure;
- a raised source structure located adjacent said gate structure;
- said raised source structure defining a gap located between said gate structure and said raised source structure;
- and
- a capping layer formed on the substrate assembly.
3 more elements
A transistor, comprising:
- a substrate layer;
- a gate structure;
- a first doped polysilicon area located adjacent said gate structure, said first doped polysilicon area defining a gap located between said gate structure and said first doped polysilicon area;
- a second doped polysilicon area located adjacent said gate structure, said second doped polysilicon area defining a gap located between said gate structure and said second doped polysilicon area;
- a first pocket implant area in said substrate layer, said first implant area located beneath said first doped polysilicon area;
- a second pocket implant area in said substrate layer, said second implant area located beneath said second doped polysilicon area;
- and
- a capping layer, said capping layer closing said gaps.
5 more elements
A method of forming a semiconductor structure on a substrate assembly, the substrate assembly having a gate, comprising:
- forming a sacrificial layer on the substrate assembly;
- removing a portion of said sacrificial layer to form at least one spacer adjacent said gate;
- forming raised source and drains on the substrate assembly;
- and
- removing said spacer.
2 more elements
A method of forming a semiconductor structure with a gate on a substrate assembly, comprising:
- forming a sacrificial layer on the substrate assembly;
- removing a portion of said sacrificial layer to form at least one spacer adjacent said gate;
- forming raised source and drains on the substrate assembly;
- removing said spacer;
- and
- forming a capping layer on the substrate assembly.
3 more elements
A method of forming a semiconductor structure with a gate on a substrate assembly, comprising:
- forming a sacrificial layer on the substrate assembly;
- removing a portion of said sacrificial layer to form at least one spacer adjacent said gate;
- forming raised source and drains on said substrate assembly;
- removing said spacer to form a gap;
- and
- forming a junction area beneath said gap and partially beneath said gate.
3 more elements
A method of forming a semiconductor structure having a gate on a substrate assembly, comprising:
- forming a sacrificial layer on the substrate assembly;
- removing a portion of said sacrificial layer to form at least one spacer adjacent said gate;
- forming raised source and drains on said substrate assembly;
- removing said spacer to form a gap;
- forming a junction area substantially beneath said gap;
- and
- forming a capping layer on the substrate assembly.
4 more elements
A method of forming a semiconductor structure with raised source and drains on a substrate assembly, the substrate assembly having a gate, comprising:
- forming a gap between the source and the gate;
- and
- forming a pocket implant beneath said gap and partially beneath the gate and the raised source.
A method of forming a semiconductor structure with raised source and drains on a substrate assembly, the substrate assembly having a gate, comprising:
- forming a gap between the drain and the gate;
- and
- forming a pocket implant substantially beneath said gap and partially beneath the gate and the raised drain.
A method of creating a transistor on a substrate assembly, comprising:
- forming a gate structure;
- forming raised source and drain structures;
- and
- forming junction areas in the substrate assembly between said gate structure and said raised source structure and between said gate structure and said raised drain structure, said junction areas extending beneath said gate structure and said raised source and drains.
1 more element
A method of forming a transistor on a substrate assembly, comprising:
- forming an oxide layer on a substrate layer;
- forming a doped polysilicon layer on said oxide layer;
- removing portions of said doped polysilicon layer to form a gate;
- forming a sacrificial layer on the substrate assembly;
- removing portions of said sacrificial layer to form a plurality of spacers adjacent said gate;
- removing portions of said oxide layer;
- forming a polysilicon layer on the substrate assembly;
- planarizing said substrate assembly;
- removing portions of said polysilicon layer to form a raised source and a raised drain;
- forming a conductive layer on the substrate assembly;
- doping said polysilicon layer;
- removing portions of said conductive layer;
- removing said spacers to create a plurality of gaps;
- doping said substrate layer beneath said gaps;
- forming a capping layer on said substrate assembly;
- and
- forming an insulative layer on said substrate assembly.
14 more elements
A semiconductor device, comprising:
- a substrate assembly;
- at least one raised source;
- at least one raised drain;
- and
- at least one gate located between said source and said drain, said gate defining a first gap between said gate and said source, and said gate defining a second gap between said gate and said drain.
2 more elements
A semiconductor device, comprising:
- a substrate assembly;
- at least one raised source;
- at least one raised drain;
- at least one gate located between said source and said drain, said gate defining a first gap between said gate and said source, and said gate defining a second gap between said gate and said drain;
- a first junction area located in said substrate assembly beneath said first gap;
- and
- a second junction area located in said substrate assembly beneath said second gap.
4 more elements
A system, comprising:
- a memory device having at least one semiconductor structure, said structure including:
- a raised source;
- a raised drain;
- and
- a gate located between said source and said drain, said gate defining a first gap between said gate and said source, and said gate defining a second gap between said gate and said drain;
- a processor;
- and
- a bus connecting said processor and said memory device.
5 more elements
A system, comprising:
- a memory device having at least one semiconductor structure formed on a substrate assembly, said structure including:
- a raised source;
- a raised drain;
- a gate located between said source and said drain, said gate defining a first gap between said gate and said source, and said gate defining a second gap between said gate and said drain;
- a first junction area located in the substrate assembly beneath said first gap;
- and
- a second junction area located in the substrate assembly beneath said second gap;
- a processor;
- and
- a bus connecting said processor and said memory device.
7 more elements
Dependencies are inferred from the claim text.