Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorJun Koyama
Life of this patent
Estimating the term…
Abstract
In a conventional analog buffer circuit composed of polycrystalline semiconductor TFTs, a variation in the output is large. Thus, a measure such as to provide a correction circuit has been taken. However, there has been such a problem that a circuit and driver operation are complicated. Therefore, a gate length and a gate width of a TFT composing an analog buffer circuit is set to be larger. Also, a multi-gate structure is adopted thereto. In addition, the arrangement of channel regions is devised. Thus, the analog buffer circuit having a small variation is obtained without using a correction circuit, and a semiconductor device having a small variation can be provided.
Claims28
A semiconductor device comprising;
- an analog buffer comprising at least one thin film transistor;
- and
- a channel region of the thin film transistor, the channel region comprising a polycrystalline semiconductor layer,
- wherein a gate length of the thin film transistor is 7 μm or longer.
A semiconductor device comprising;
- an analog buffer comprising at least one thin film transistor;
- and
- a channel region of the thin film transistor, the channel region comprising a polycrystalline semiconductor layer,
- wherein a gate width of the thin film transistor is 50 μm or longer.
A semiconductor device comprising;
- an analog buffer comprising at least one thin film transistor;
- and
- a channel region of the thin film transistor, the channel region comprising a polycrystalline semiconductor layer,
- wherein a gate length of the thin film transistor is 7 μm or longer and a gate width of the thin film transistor is 50 μm or longer.
A semiconductor device comprising;
- an analog buffer comprising at least one thin film transistor;
- and
- a channel region of the thin film transistor, the channel region comprising a polycrystalline semiconductor layer,
- wherein the thin film transistor is a multi-gate type.
A semiconductor device comprising;
- an analog buffer comprising at least one multi-gate type thin film transistor;
- and
- a channel region of the thin film transistor, the channel region comprising a polycrystalline semiconductor layer,
- wherein a gate length of the thin film transistor is 7 μm or longer.
A semiconductor device comprising;
- an analog buffer comprising at least one multi-gate type thin film transistor;
- and
- a channel region of the thin film transistor, the channel region comprising a polycrystalline semiconductor layer,
- wherein a gate width of the thin film transistor is 50 μm or longer.
A semiconductor device comprising;
- an analog buffer comprising at least one multi-gate type thin film transistor;
- and
- a channel region of the thin film transistor, the channel region comprising a polycrystalline semiconductor layer, wherein a gate length of the thin film transistor is 7 μm or longer and a gate width of the thin film transistor is 50 μm or longer.
A semiconductor device comprising:
- an analog buffer comprising at least one of a current mirror circuit and a differential circuit, the one of the current mirror circuit and the differential circuit comprising at least a first and second thin film transistors,
- wherein each of the first and second thin film transistors has a channel region comprising a polycrystalline semiconductor layer,
- wherein a gate length of each of the first and second thin film transistors is 7 μm or longer;
- wherein the first and second thin film transistors are connected in parallel with each other;
- and
- wherein a gate electrode of the first thin film transistor and a gate electrode of the second thin film transistor are connected to a same potential.
A semiconductor device comprising:
- an analog buffer comprising at least one of a current mirror circuit and a differential circuit, the one of the current mirror circuit and the differential circuit comprising at least a first and second thin film transistors,
- wherein each of the first and second thin film transistors has a channel region comprising a polycrystalline semiconductor layer,
- wherein a gate width of each of the first and second thin film transistors is 50 μm or longer;
- wherein the first and second thin film transistors are connected in parallel with each other;
- and
- wherein a gate electrode of the first thin film transistor and a gate electrode of the second thin film transistor are connected to a same potential.
A semiconductor device comprising:
- an analog buffer comprising at least one of a current mirror circuit and a differential circuit, the one of the current mirror circuit and the differential circuit comprising at least a first and second thin film transistors,
- wherein each of the first and second thin film transistors has a channel region comprising a polycrystalline semiconductor layer,
- wherein each of the first and second thin film transistors is multi-gate type
- wherein the first and second thin film transistors are connected in parallel with each other;
- and
- wherein a gate electrode of the first thin film transistor and a gate electrode of the second thin film transistor are connected to a same potential.
A semiconductor device comprising:
- an analog buffer comprising at least one of a current mirror circuit and a differential circuit, the one of the current mirror circuit and the differential circuit comprising at least a first and second thin film transistors,
- wherein each of the first and second thin film transistors has a channel region comprising a polycrystalline semiconductor layer,
- wherein a gate length of each of the first and second thin film transistors is 7 μm or longer;
- wherein the first and second thin film transistors are connected in parallel with each other and located in a cross arrangement;
- and
- wherein a gate electrode of the first thin film transistor and a gate electrode of the second thin film transistor are connected to a same potential.
A semiconductor device comprising:
- an analog buffer comprising a source follower comprising a plurality of thin film transistors;
- and
- a channel region of the respective thin film transistors, comprising a polycrystalline semiconductor layer,
- wherein the respective thin film transistors is a multi-gate type;
- wherein a gate length of the respective thin film transistors is 7 μm or longer and a gate width of the respective thin film transistors is 50 μm or longer;
- wherein the plurality of thin film transistors are connected in parallel with each other;
- and
- wherein gate electrodes of the plurality of thin film transistors are connected to a same potential.
Dependencies are inferred from the claim text.