Semiconductor device and method of manufacturing the same
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHideomi Suzawa, Akira Tsunoda
Life of this patent
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Abstract
There is provided a structure of a pixel TFT (n-channel type TFT) in which an off current value is sufficiently low. In impurity regions, a concentration distribution of an impurity element imparting one conductivity type is made to have a concentration gradient, the concentration is made low at a side of a channel formation region, and the concentration is made high at the side of an end portion of a semiconductor layer.
Claims20
A semiconductor device comprising:
- a gate electrode provided over an insulating surface;
- an insulating film provided over the gate electrode;
- and
- a semiconductor layer provided over the insulating film,
- wherein the semiconductor layer includes a channel formation region overlapping
- with the gate electrode, and an impurity region formed to be in contact with the channel formation region, and
- wherein the impurity region has a concentration distribution in which as a distance from the channel formation region becomes larger, an impurity concentration is increased.
A method of manufacturing a semiconductor device, comprising the steps of:
- forming a gate electrode over an insulating surface;
- forming a gate insulating film over the gate electrode;
- forming a semiconductor layer over the gate insulating film;
- forming an insulating film over the semiconductor layer;
- forming an insulating layer having a taper portion over the semiconductor layer by etching the insulating film formed over the semiconductor layer;
- and
- forming an impurity region in which an impurity concentration is increased toward an end portion of the taper portion, by adding an impurity element imparting one conductivity type to the semiconductor layer through the taper portion.
A method of manufacturing a semiconductor device, comprising the steps of:
- forming a gate electrode over an insulating surface;
- forming a gate insulating film over the gate electrode;
- forming a semiconductor layer over the gate insulating film;
- forming a first insulating film over the semiconductor layer;
- forming a second insulating film over the first insulating film;
- forming a resist mask over the second insulating film;
- forming a second insulating layer covering a portion which becomes a channel formation region by selectively etching the second insulating film while forming a first insulating layer having a taper portion on the semiconductor layer by selectively etching the first insulating film;
- adding an impurity element imparting one conductivity type to the semiconductor layer while the resist mask is used as a mask;
- and
- forming an impurity region in which an impurity concentration is increased toward an end portion of the taper portion, by adding an impurity element imparting one conductivity type to the semiconductor layer through the taper portion after the resist mask is removed.
Dependencies are inferred from the claim text.