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US 2002/0002667 A1Published application
System and method for instruction level multithreading in an embedded processor using zero-time context switching
AssigneeUbicom, Inc.
InventorsNicholas J. Kelsey, Christopher J. Waters, Tibet Mimaroglu, David A. Fotland
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Abstract
A system and method for enabling multithreading in a embedded processor, invoking zero-time context switching in a multithreading environment, scheduling multiple threads to permit numerous hard-real time and non-real time priority levels, fetching data and instructions from multiple memory blocks in a multithreading environment, and enabling a particular thread to modify the multiple states of the multiple threads in the processor core.
Claims10
A computer based system for switching between program contexts comprising:
- an embedded pipelined processor capable having a first program thread and a second program thread in an execution pipeline;
- a first set of data storage devices capable of storing a first state of said embedded processor;
- a second set of data storage devices capable of storing a second state of said embedded processor;
- and
- a thread scheduler for identifying which of said program threads said embedded processor executes;
- wherein said processor switches between said first and second state in a time period between the end of the execution of a first program instruction in the first thread and the beginning of the execution of a second program instruction in the second thread.
3 more elements
Dependencies are inferred from the claim text.