Semiconductor memory device having silicon-on-insulator (SOI) structure and method for fabricating thereof

A method for fabricating a semiconductor device comprising:

• providing a processing wafer having first and second surfaces opposing each other;
• forming a device isolation layer in the first surface of the processing wafer to define active an inactive regions;
• grinding and/or polishing the second surface of the processing wafer down to a top surface of the device isolation layer to form a polished surface;
• forming a first insulating layer on the polished surface;
• forming a conductor on and in the first insulating layer;
• forming a gate electrode structure being composed of a gate oxide, a gate electrode and a pair of source/drain region on the active region, wherein the active region between the pair of the source/drain region and underlying the gate electrode is electrically connected to the conductor;
• forming a second insulating layer on the gate electrode structure and on the first surface of the processing wafer;
• and
• bonding one surface of a handling wafer onto the first insulating layer.

A SOI semiconductor device comprising:

• a semiconductor substrate having first and second surfaces opposing each other, the first surface having an active region;
• a first gate electrode structure being composed of a gate oxide, a gate electrode and a pair of source/drain region on the active region of first surface of the substrate;
• a first insulating layer formed on the second surface of the substrate;
• a second insulating layer formed on the first gate electrode on the substrate;
• a third insulating layer formed on the second insulating layer;
• and
• a handling wafer formed on the third insulating layer.