Semiconductor memory device

Abstract

A semiconductor memory device of the present invention is capable of reducing self-refresh current by preventing bit line separation signal (BISH/BISL) toggling when word lines in the same block are enabled/disabled. The semiconductor memory device has a cross area between a plurality of sense amplifier blocks and includes a self-refresh and internal address detector receiving a multiplicity of internal addresses and a self-refresh signal for generating a signal determining whether bit line separation signals are to be toggled; a block selecting signal latch for latching the output signal of the self-refresh and internal address detector and a block selecting signal; and a BISH/BISL controller receiving the output signals of the block selecting signal latch for generating the bit line separation signals, wherein the cross area between the sense amplifier blocks includes a bit line separation driver controlled by the bit line separation signals.

Dependencies are inferred from the claim text.