Apparatus for and method of controlling amplifier output offset using body biasing in mos transistors

Abstract

Method and apparatus for controlling amplifier output offset using body biasing in MOS transistors. A pair of input transistors have isolated bodies. A differential input signal is applied across the gates of the input transistors. An output signal is derived from a voltage at the drain of one of the input transistors. A feedback loop includes an integrator and a feedback amplifier. The integrator integrates the output signal, thereby forming an integrated output signal. The integrated output signal is applied to a first input of the feedback amplifier, while a reference voltage is applied to a second input of the feedback amplifier. The feedback amplifier controls the voltage of the body of one of the input transistors. The body of the other input transistor is coupled to its source. The threshold voltage of the input transistor having its body coupled to the feedback amplifier is controlled such that a quiescent level of the output signal tends to equal the reference voltage. A time constant associated with the feedback loop is sufficiently long that frequencies of interest for the input differential signal pass to the output of the amplifier without affecting the bias voltage formed by the feedback loop. A comparator differs from the amplifier in that the integrator and feedback amplifier are omitted and, instead, a second reference voltage is applied directly to the body of the input transistor having its body voltage controlled. The offset voltage is reduced or eliminated by adjusting the second reference voltage.

Dependencies are inferred from the claim text.