Semiconductor device having hierarchical power supply line structure improved in operating speed

A semiconductor device comprising:

• a main power supply line supplied with a power supply potential;
• a sub power supply line provided in correspondence to said main power supply line;
• an internal circuit connected to said sub power supply line for performing a prescribed operation in response to at least one input signal;
• a connection circuit connecting said main power supply line and said sub power supply line with each other in response to an activation signal;
• and
• a control circuit generating said activation signal,
• said control circuit including:
• a timing change circuit changing an activation timing for said activation signal with reference to an input timing of said input signal in a test mode.

A semiconductor device comprising:

• a first main power supply line supplied with a first power supply potential;
• a second main power supply line supplied with a second power supply potential lower than said first power supply potential;
• a first sub power supply line provided in correspondence to said first main power supply line;
• a second sub power supply line provided in correspondence to said second main power supply line;
• a first internal circuit having first and second power supply nodes connected to said first and second sub power supply lines respectively, receiving at least one input signal and performing a prescribed operation;
• a first control circuit connecting said first main power supply line and said first sub power supply line with each other in an operating mode while holding the potential difference between said first main power supply line and said first sub power supply line at a prescribed first value in a standby mode;
• and
• a second control circuit connecting said second main power supply line and said second sub power supply line with each other in said operating mode while holding the potential difference between said second main power supply line and said second sub power supply line at a prescribed second value in said standby mode.

A semiconductor device comprising:

• a main power supply line supplied with a first power supply potential;
• a first sub power supply line provided in correspondence to said main power supply line,
• a first internal circuit having a first power supply node connected to said first sub power supply line and performing a first prescribed operation,
• a second sub power supply line provided in correspondence to said main power supply line,
• a second internal circuit having a second power supply node connected to said second sub power supply line and performing a second prescribed operation,
• a pad for observing the potentials of said first sub power supply line and said second sub power supply line, and
• a selection circuit selectively connecting either one of said first sub power supply line and said second sub power supply line to said pad.