Signal transmission with reduced ringing of signals
OwnerMasao Taguchiinventor
Life of this patent
Estimating the term…
Abstract
A signal-transmission system includes signal-transmission lines connected to a terminal voltage via terminal resistances, open-drain-type transistors outputting signals to the signal-transmission lines, branch lines stemming from the signal-transmission lines to connect the open-drain-type transistors with the signal-transmission lines, and insertion resistances inserted in the branch lines in proximity of the signal-transmission lines.
Claims17
A signal-transmission system comprising:
- signal-transmission lines connected to a terminal voltage via terminal resistances;
- open-drain-type transistors outputting signals to said signal-transmission lines;
- branch lines stemming from said signal-transmission lines to connect said open-drain-type transistors with said signal-transmission lines;
- and
- insertion resistances inserted in said branch lines in proximity of said signal-transmission lines.
A semiconductor-device module connected to signal-transmission lines which are connected to a terminal voltage via terminal resistances, said semiconductor-device module comprising:
- a board;
- electrodes arranged on said board and coupled to said signal-transmission lines;
- at least one semiconductor device mounted on said board and having open-drain-type transistors for outputting signals to said signal-transmission lines;
- connection lines connecting between said electrodes and said open-drain-type transistors;
- insertion resistances inserted in said connection lines in proximity of said signal-transmission lines.
A signal-transmission system comprising:
- a bus connected to a termination voltage via termination resistances;
- a first chip connected to said bus via first connection lines longer than a predetermined length;
- a second chip connected to said bus via second connection lines shorter than said predetermined length;
- and
- resistances inserted in said first connection lines in proximity of said bus, wherein no resistances are inserted in said second connection lines.
The signal-transmission system as claimed in claim 11, wherein said first chip comprises a memory controller contained in one of a PGA package and a BGA package, and wherein said second chip comprises a memory chip vertically positioned to stand on a board carrying said bus when said memory chip is mounted on said board.
An input buffer circuit for receiving a signal having a voltage range centered around a voltage in proximity of a power voltage, said input buffer circuit comprising:
- a level-shift circuit shifting voltage levels of said signal and a reference voltage to produce a level-shifted signal voltage and a level-shifted reference voltage;
- a target-voltage setting circuit controlling said level-shift circuit such that said level-shifted reference voltage becomes a predetermined target voltage;
- and
- a differential-amplifier circuit amplifying a difference between said level-shifted signal voltage and said level-shifted reference voltage.
An input buffer circuit for receiving a signal having a voltage range centered around a voltage in proximity of a power voltage, said input buffer circuit comprising:
- a differential-amplifier circuit detecting a voltage difference between said signal and a reference voltage;
- and
- a current-to-voltage converting circuit receiving a current commensurate with said voltage difference to convert said current into a voltage.
An input buffer circuit for receiving a signal having a voltage range centered around a voltage closer to a ground voltage between said ground voltage and a power voltage, said input buffer circuit comprising:
- a differential-amplifier circuit detecting a voltage difference between said signal and a reference voltage;
- and
- a current-to-voltage converting circuit receiving a current commensurate with said voltage difference to convert said current into a voltage.
A semiconductor device coupled to signal-transmission lines connected to a termination voltage via termination resistances;
- said semiconductor device comprising:
- electrodes connected to said signal-transmission lines;
- open-drain-type transistors outputting signals to said signal-transmission lines;
- connection lines connecting said electrodes with said open-drain-type transistors;
- and
- insertion resistances inserted in said connection lines in proximity of said signal-transmission lines.
Dependencies are inferred from the claim text.