Complementary current mode driver for high speed data communications
OwnerJinghui Lu, Edward K. F. Leeinventors
Life of this patent
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Abstract
An integrated circuit driver provides, among other things, a high data communication rate, a large common mode output voltage range, avoidance of spikethrough current that increases power consumption, improved switching speed using current-steering techniques, and improved matching of steady-state output current in the high logic state to that of the low logic state. The driver includes complementary differential pairs and associated current mirror circuits that differentially source/sink current at a pair of load conductors to drive the load conductors into a logic state. A single-ended embodiment is also described.
Claims28
An integrated circuit driver comprising:
- a first current regulating circuit, adjusting a current delivered to a first current output based on a signal received at a first input;
- a first current mirror circuit, providing a first output current to a first driver output based on the current received from the first current output of the first current regulating circuit;
- a second current regulating circuit, adjusting a current delivered to a second current output based on a signal received at a second input;
- and
- a second current mirror circuit, providing a second output current to the first driver output based on the current received from the second current output of the second current regulating circuit.
An integrated circuit driver comprising:
- a first current regulating circuit which steers a first input current to first and second current outputs based on signals received at first and second inputs;
- a first current mirror circuit providing a first output current to a first driver output based on a current received from the first current output of the first current regulating circuit;
- a second current mirror circuit providing a second output current to a second driver output based on a current received from the second current output of the first current regulating circuit;
- a second current regulating circuit which steers a second input current to third and fourth current outputs based on signals received at third and fourth inputs;
- a third current mirror circuit providing a third output current to the first driver output based on a current received from the third current output of the second current regulating circuit;
- and
- a fourth current mirror circuit, providing a fourth output current to the second driver output based on a current received from the fourth current output of the second current regulating circuit.
An integrated circuit driver comprising:
- a first current source, sourcing a first input current;
- a p-channel first input transistor, including a source coupled to receive the first input current from the first current source, a gate that receives a first input voltage, and a drain;
- a p-channel second input transistor, including a source coupled to the source of the first input transistor, a gate that receives a second input voltage, and a drain;
- an n-channel first load transistor, including a gate and drain coupled to the drain of the first input transistor, and a source coupled to a ground voltage;
- an n-channel second load transistor, including a gate and drain coupled to the drain of the second input transistor, and a source coupled to a ground voltage;
- an n-channel first current mirror transistor, including a gate coupled to the gate of the first load transistor, a source coupled to the ground node, and a drain coupled to a first driver output terminal;
- an n-channel second current mirror transistor, including a gate coupled to the gate of the second load transistor, a source coupled to the ground node, and a drain coupled to a second driver output terminal;
- a second current source, sinking a second input current;
- an n-channel third input transistor, including a source coupled to receive the second input current from the second current source, a gate that receives a third input voltage, and a drain;
- an n-channel fourth input transistor, including a source coupled to the source of the third input transistor, a gate that receives a fourth input voltage, and a drain;
- a p-channel third load transistor, including a gate and drain coupled to the drain of the third input transistor, and a source coupled to a power supply node;
- a p-channel fourth load transistor, including a gate and drain coupled to the drain of the fourth input transistor, and a source coupled to the power supply node;
- a p-channel third current mirror transistor, including a gate coupled to the gate of the third load transistor, a source coupled to the power supply node, and a drain coupled to the first driver output terminal;
- and
- a p-channel fourth current mirror transistor, including a gate coupled to the gate of the fourth load transistor, a source coupled to the power supply node, and a drain coupled to the second output terminal.
An integrated circuit driver comprising:
- first and second driver outputs;
- a first current regulating circuit, including first and second inputs and first and second current outputs, the first current regulating circuit steering a first input current to the first and second current outputs based on signals received at the first and second inputs;
- a second current regulating circuit, including third and fourth inputs and third and fourth outputs, the second current regulating circuit steering a second input current to the third and fourth current outputs based on signals received at the third and fourth inputs;
- a means for performing the function of providing a first output current to the first driver output based on the first current output of the first current regulating circuit and the third current output of the second current regulating circuit;
- and
- a means for performing the function of providing a second output current to the second driver output based on the second current output of the first current regulating circuit and the fourth current output of the second current regulating circuit.
A system comprising:
- a first electronic device, including:
- a first communication port, having first and second communication port terminals;
- a first driver, including:
- a first current regulating circuit, including first and second inputs and first and second current outputs, the first current regulating circuit steering a first input current to the first and second current outputs based on signals received at the first and second inputs;
- a first current mirror circuit, providing a first output current to the first communication port terminal based on a current received from the first current output;
- a second current mirror circuit, providing a second output current to the second communication port terminal based on a current received from the second current output;
- a second current regulating circuit, including third and fourth inputs and third and fourth current outputs, the second current regulating circuit steering a second input current to the third and fourth current outputs based on signals received at the third and fourth inputs;
- a third current mirror circuit, providing a third output current to the first communication port terminal based on a current received from the third current output;
- and
- a fourth current mirror circuit, providing a fourth output current to the second communication port terminal based on a current received from the fourth current output;
- a second electronic device, including a second communication port having third and fourth communication port terminals;
- and
- a bus, coupling the first and second electronic devices, the bus including:
- a first connection path between the first communication port terminal and the third communication port terminal;
- and
- a second connection path between the second communication port terminal and the fourth communication port terminal.
A method of communicating across a bus including first and second bus connections, the method comprising:
- steering, based on first and second input voltages, a first component of a first input current along a first path and a second component of the first input current along a second path;
- providing a first output current to the first bus connection based on the first component of the first input current;
- providing a second output current to the second bus connection based on the second component of the first input current;
- steering, based on third and fourth input voltages, a first component of a second input current along a third path and a second component of the second input current along a fourth path;
- providing a third output current to the first bus connection based on the first component of the second input current;
- and
- providing a fourth output current to the second bus connection based on the second component of the second input current.
Dependencies are inferred from the claim text.