Back to results
US 2002/0000673 A1Published application
Mask repattern process
AssigneeMicron Technology, Inc.
InventorWarren M. Farnworth
Life of this patent
Estimating the term…
Abstract
The present invention relates to an improved method for forming a UBM pad and solder bump connection for a flip chip which eliminates at least two mask steps required in standard UBM pad forming processes when repatterning the bond pad locations.
Claims11
A semiconductor device, said semiconductor device comprising:
- a semiconductor substrate including a plurality of circuits thereon, each circuit of said plurality of circuits connected to a bond pad, a first passivation layer thereon covering said plurality of circuits and having an aperture therethrough at each bond pad, a plurality of solder wettable conductive traces, each trace of said plurality of solder wettable conductive traces having a portion thereof connected to a bond pad and having a portion thereof located on a portion of the first passivation layer, a second insulative passivation layer comprising a polyamide material covering said plurality of solder wettable conductive traces and the portion of the first passivation layer, said second insulative passivation layer including a plurality of sloped-wall vias therethrough located over the portion of said each of said plurality of solder wettable conductive traces, and a solder material located in each sloped-wall via of said plurality of sloped-wall vias via in said second insulative passivation layer, said solder material directly contacting the portion of at least one solder wettable conductive trace of said plurality of solder wettable conductive traces, said at least one sloped wall via of said plurality of sloped-wall vias including:
- the portion of the at least one solder wettable conductive trace of said plurality of solder wettable conductive traces directly contacting said solder material, said at least one solder wettable conductive trace of said plurality of solder wettable conductive traces in electrical communication with integrated circuitry carried by said semiconductor substrate connected to at least one circuit of said plurality of circuits.
A semiconductor device, said semiconductor device comprising:
- a semiconductor substrate including at least one circuit thereon connected to a bond pad, a first passivation layer thereon covering said at least one circuit and having an aperture therethrough located at the bond pad, at least one solder wettable conductive trace having a portion thereof connected to the bond pad and located on a portion of the first passivation layer, a second passivation layer including a stress absorbing insulation material covering said at least one solder wettable conductive trace and the portion of the first passivation layer, said second passivation layer including at least one sloped-wall via therethrough located over the portion of said at least one solder wettable conductive trace, and a solder material located in the at least one sloped-wall via in said second passivation layer, said solder material directly contacting the portion of said at least one solder wettable conductive trace, said at least one sloped wall via including:
- the portion of the at least one solder wettable conductive trace directly contacting said solder material, said at least one solder wettable conductive trace in electrical communication with integrated circuitry carried by said semiconductor substrate connected to said at least one circuit.
A semiconductor device, said semiconductor device comprising:
- a semiconductor substrate including at least one circuit thereon connected to a bond pad, a first passivation layer thereon covering said at least one circuit and having an aperture therethrough located at the bond pad, at least one solder wettable conductive trace having a portion thereof connected to the bond pad and located on a portion of the first passivation layer, a substantially non-conductive second passivation layer including a stress absorbing material covering said at least one solder wettable conductive trace and the portion of the first passivation layer, said substantially non-conductive second passivation layer including at least one sloped-wall via therethrough located over a portion of said at least one solder wettable conductive trace, and a solder material located in the at least one sloped-wall via in said non-conductive second passivation layer, said solder material directly contacting the portion of said at least one solder wettable conductive trace, said at least one sloped wall via including:
- the portion of said at least one solder wettable conductive trace directly contacting said solder material, said at least one solder wettable conductive trace connected with integrated circuitry of said semiconductor substrate connected to said at least one circuit.
A semiconductor device comprising:
- a semiconductor substrate including at least one circuit thereon connected to a bond pad, a first passivation layer thereon covering said at least one circuit and having an aperture therethrough at the bond pad, at least one solder wettable conductive trace having a portion thereof connected to the bond pad and located on a portion of the first passivation layer, a second passivation layer including a stress absorbing material without conductive particles therein covering said at least one solder wettable conductive trace and the portion of the first passivation layer, said second passivation layer including at least one sloped-wall via therethrough over the portion of said at least one solder wettable conductive trace, and a solder material located in the at least one sloped-wall via in said second passivation layer, said solder material directly contacting the portion of said at least one solder wettable conductive trace, said at least one sloped-wall via including:
- the portion of said at least one solder wettable conductive trace directly contacting said solder material, said at least one solder wettable conductive trace connected to integrated circuitry of said semiconductor substrate connected to said at least one circuit.
A semiconductor device comprising:
- a semiconductor substrate including at least one circuit thereon connected to a bond pad, a first passivation layer thereon covering said at least one circuit and having an aperture therethrough located at the bond pad, at least one solder wettable conductive trace having a portion thereof connected to the bond pad and located on a portion of the first passivation layer, a second passivation layer including a stress absorbing material without particles therein covering said at least one solder wettable conductive trace and the portion of the first passivation layer, said second passivation layer including at least one sloped-wall via therethrough located over the portion of said at least one solder wettable conductive trace, and a solder material located in the at least one sloped-wall via in said second passivation layer, said solder material directly contacting the portion of said at least one solder wettable conductive trace, said at least one sloped-wall via including:
- the portion of said at least one solder wettable conductive trace directly contacting said solder material, said at least one solder wettable conductive trace connected to said at least one circuit.
A semiconductor device comprising:
- a semiconductor substrate including at least one circuit thereon connected to a bond pad, a first passivation layer thereon covering said at least one circuit and having an aperture therethrough located at the bond pad, at least one solder wettable conductive trace having a portion thereof connected to the bond pad and located on a portion of the first passivation layer, a second passivation layer including a stress absorbing material having no particles therein covering said at least one solder wettable conductive trace and the portion of the first passivation layer, said second passivation layer including at least one sloped-wall via therethrough located over the at least one conductive trace, and a solder material located in the at least one sloped-wall via in said second passivation layer, said solder material directly contacting the portion of said at least one solder wettable conductive trace, said at least one sloped-wall via including:
- the portion of said at least one solder wettable conductive trace directly contacting said solder material, said at least one solder wettable conductive trace connected to said at least one circuit.
A semiconductor device comprising:
- a semiconductor substrate including at least one circuit thereon connected to a bond pad, a first passivation layer thereon covering said at least one circuit and having an aperture therethrough located at the bond pad, at least one solder wettable conductive trace having a portion thereof connected to the bond pad and located on a portion of the first passivation layer, a second passivation layer of stress absorbing material having no conductive particles therein covering said at least one solder wettable conductive trace and the portion of the first passivation layer, said second passivation layer including at least one sloped-wall via therethrough located over the portion of said at least one solder wettable conductive trace, and a solder material located in the at least one sloped-wall via in said second passivation layer, said solder material directly contacting the portion of said at least one solder wettable conductive trace, said at least one sloped-wall via including:
- the portion of said at least one solder wettable conductive trace directly contacting said solder material, said at least one solder wettable conductive trace connected to said at least one circuit.
Dependencies are inferred from the claim text.