Semiconductor device conductive bump and interconnect barrier

A semiconductor device, comprising:

• an interconnect over a semiconductor device substrate;
• a passivation layer that overlies the interconnect, the passivation layer having an opening that exposes a portion of the interconnect;
• and
• a conductive barrier layer within the opening that overlies the portion of the interconnect.

A method of forming a semiconductor device comprising:

• forming a first interconnect overlying a semiconductor device substrate;
• forming an insulating barrier layer overlying the first interconnect;
• forming a second interconnect overlying portions of the first interconnect and the insulating barrier layer;
• forming a conductive barrier layer overlying a portion of the second interconnect, the conductive barrier layer extending beyond an edge region of the portion of the second interconnect;
• forming a passivation layer overlying the conductive barrier layer;
• and
• forming an opening in the passivation layer, wherein the opening exposes portions of the conductive barrier layer.

A method of forming a semiconductor device, comprising:

• forming an interconnect over a semiconductor device substrate;
• forming a passivation layer over the interconnect;
• forming an opening in the passivation layer, the opening exposing portions of the interconnect;
• and
• forming a conductive barrier layer within the opening, the conductive barrier layer overlying exposed portions of the interconnect.