Semiconductor integrated circuit having a self-refresh function
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorKyoji Yamasaki
Life of this patent
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Abstract
A self-refresh circuit included in a semiconductor integrated circuit includes a ring oscillator, a double period counter, an SELF generating portion generating a signal SELFO corresponding to an internal RAS, and a BBUE generating portion. The double period counter performs a count operation, using the output signal of the double period counter as a basic signal. The BBUE generating portion generates a BBUE signal in accordance with the output of double period counter. When the BBUE rises to H-level, the self-refresh signal SELF corresponding to signal SELF0 is issued. A layout area can be small, and timing of entry in a self-refresh mode can be finely set.
Claims5
A semiconductor integrated circuit comprising:
- a memory cell array including a plurality of memory cells arranged in rows and columns;
- and
- a self-refresh circuit for issuing a self-refresh signal determining a self-refresh period for selection of the row in said memory cell array in a self-refresh mode,
- said self refresh circuit including:
- a ring oscillator receiving a specific signal and issuing an oscillation signal,
- a counter receiving said oscillation signal, and issuing count signals of m bits (m:
- natural number),
- a pulse signal generating circuit generating a pulse signal based on the count signals of m bits,
- a self-in signal generating circuit for generating a self-in signal in response to the output of said counter after a predetermined period from entry of said specific signal, and
- a circuit for generating said self-refresh signal based on said pulse signal in response to said self-in signal.
Dependencies are inferred from the claim text.