Semiconductor device having multilayer wiring structure and method for manufacturing the same
AssigneeKabushiki Kaisha Toshiba
InventorYuji Fukazawa
Life of this patent
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Abstract
A method for manufacturing a semiconductor device includes a step of forming a first groove in a first insulating film, forming a conductive film in the first groove, a step of selectively forming a second insulating film on the conductive film and the first insulating film, a step of forming a second groove by removing part of the conductive film using the second insulating film as a mask, the second groove being formed so as to form a connecting portion of the conductive film under the second insulating film and form a first wiring layer by forming the connecting portion with a bottom of the first groove integrally with each other as one unit.
Claims21
A method for manufacturing a semiconductor device, comprising the steps of:
- forming a first insulating film;
- forming a first groove in the first insulating film;
- forming a conductive film in the first groove;
- selectively forming a second insulating film on the conductive film and the first insulating film, the second insulating film being formed so as to form a first region in which the second insulating film covers a surface of the conductive film and a second region in which the second insulating film does not cover the surface of the conductive film;
- forming a second groove by removing part of the conductive film of the second region using the second insulating film as a mask, the second groove being formed so as to form a connecting portion of the conductive film under the second insulating film and form a first wiring layer by forming the connecting portion with a bottom of the first groove integrally with each other as one unit;
- removing the second insulating film;
- forming a third insulating film in the second groove;
- and
- forming a second wiring layer electrically connected to the first wiring layer through the connecting portion.
A method for manufacturing a semiconductor device, comprising the steps of:
- forming a first insulating film;
- forming a second insulating film on the first insulating film;
- forming a third insulating film on the second insulating film;
- forming a first groove in the first, second and third insulating films;
- forming a conductive film in the first groove;
- selectively forming a fourth insulating film on the conductive film and the third insulating film, the fourth insulating film being selectively formed so as to form a first region in which the fourth insulating film covers a surface of the conductive film and a second region in which the fourth insulating film does not cover the surface of the conductive film;
- removing the conductive film of the second region using the fourth insulating film as a mask, the conductive film being removed so as to form a connecting portion of the conductive film under the fourth insulating film and form a first wiring layer by forming the connecting portion with a bottom of the first groove integrally with each other as one unit;
- removing the third and fourth insulating films to expose a surface of the second insulating film;
- forming a fifth insulating film on the second insulating film with the exposed surface and on the first wiring layer;
- and
- forming a second wiring layer electrically connected to the first wiring layer through the connecting portion.
A semiconductor device comprising:
- a first wiring layer;
- a second wiring layer formed above the first wiring layer;
- and
- a connecting portion for electrically connecting the first and second wiring layers, the connecting portion being formed integrally with the first wiring layer as one unit, and a boundary between a side of the connecting portion and a surface of the first wiring layer being curved.
A semiconductor device comprising:
- a first wiring layer;
- a second wiring layer formed above the first wiring layer;
- and
- a connecting portion for electrically connecting the first and second wiring layers, the connecting portion being formed integrally with the first wiring layer as one unit, and the connecting portion has an opening with dimensions smaller than minimum process dimensions F.
Dependencies are inferred from the claim text.