Integrated circuit and method
AssigneeTexas Instruments Incorporated
InventorsTheodore S. Moise, Guoqiang Xing, Mark Visokay, Justin F. Gaynor, Stephen R. Gilbert, Francis Celii, Scott R. Summerfelt, Luigi Colombo
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Abstract
A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch.
Claims6
A method of etching a material with the use of a hardmask and a plasma-activated etchant, the improvement consisting of
- the hardmask is made of nitrides of titanium and/or aluminum, the etchant includes chlorine, oxygen, and nitrogen, and the etching is at a temperature on the order of 250-400 C.
A method of formation of a capacitor of the type of a bottom diffusion barrier, a bottom electrode, a ferroelectric, a top electrode, and a top diffusion barrier, the improvement consisting of:
- etching a stack of diffusion barrier, electrode, ferroelectric, electrode, diffusion barrier materials with a plasma-activated etchant and using optical emission spectroscopy at two or more wavelengths to detect material boundaries and switch etchant composition.
A method of formation of a capacitor of the type of a bottom diffusion barrier, a bottom electrode, a ferroelectric, a top electrode, and a top diffusion barrier plus a sidewall diffusion barrier, the improvement consisting of:
- depositing a conformal layer of diffusion barrier material over a capacitor stack of diffusion barrier, electrode, ferroelectric, electrode, diffusion barrier materials, and anisotropically removing the portions of said diffusion barrier material away from the sidewall of said capacitor stack.
A method of capacitor formation of the type of forming a bottom electrode, depositing dielectric, and depositing a top electrode, the improvement consisting of:
- surface oxidizing the bottom electrode after formation and prior to dielectric deposition.
Dependencies are inferred from the claim text.