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US 2001/0054513 A1Published application
Package substrate
OwnerMotoo Asai, Yoji Moriinventors
Life of this patent
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OwnerMotoo Asai, Yoji Moriinventors
Estimating the term…
According to the package board of the present invention, each soldering pad formed on the top surface of the package board, on which an IC chip is to be mounted, is small (133 to 170 μm in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also small. On the other hand, each soldering pad formed on the bottom surface of the package board, on which a mother board, etc. are to be mounted, is large (600 μm in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also large. Consequently, a dummy pattern 58M is formed between conductor circuits 58U and 58U for forming signal lines on the IC chip side surface of the package board thereby to increase the metallic portion on the surface and adjust the rate of the metallic portion between the IC chip side and the mother board side of the package board, protecting the package board from warping in the manufacturing processes, as well as during operation.
A package board having a core board on each surface of which a plurality of conductor circuits are formed with an interlaminar resin insulating layer therebetween, wherein a plurality of soldering pads are formed on the IC chip mounted side surface, as well as on the other side surface to be connected to another board, so that said soldering pads on the other side surface are larger than those on said IC chip side surface of said package board, and
A package board having a core board on each surface of which a plurality of conductor circuits are formed with an interlaminar resin insulating layer therebetween, wherein a plurality of soldering pads are formed on the IC chip side surface, as well as on the other side surface to be connected to another board, so that said soldering pads on the other side surface are larger than those on said IC chip side surface of said package board, and
A package board composed as a multi-layer wiring board, comprising:
A package board composed as a multi-layer printed wiring board, comprising:
A package board having a core board with a conductor layer formed on each surface, another conductor layer formed on said conductor layer with an interlaminar resin insulating layer therebetween, and a conductor layer on either of said surfaces of said core board being used as an electrode layer, wherein
A package board having a core board on each surface of which a conductor layer is formed, and another conductor layer is formed on said conductor layer with an interlaminar resin insulating layer therebetween, and a conductor layer formed on the top of any of said interlaminar resin insulating layers is used as an electrode layer, wherein
A package board comprising a multi-layer conductor circuit formed with each of a plurality of interlaminar resin insulating layers therebetween, a plurality of soldering bumps formed on the IC chip mounted side surface, as well as on the other surface connected to another board so that a space between the surface connected to another board and another board is sealed with resin, wherein
A package board comprising a multi-layer conductor circuit formed with each of a plurality of interlaminar resin insulating layers therebetween, a plurality of soldering bumps formed both on the IC chip mounted side surface and on the other side surface connected to another board so that a space between said surface connected to another board and another board is sealed with resin, wherein
Dependencies are inferred from the claim text.