Method and apparatus for fabricating electronic device

A substrate for supporting one or more electronic devices:

• dies separated from each other by strips of semiconductor material, said dies including circuits;
• and
• at least one auxiliary component formed between said dies, said auxiliary component being selectively coupled to at least two defective dies;
• wherein said auxiliary component has circuit elements used by the two defective dies to operate as an electronic device.

A semiconductor wafer having a silicon substrate upon which at least one integrated circuit is formed, the semiconductor wafer comprising:

• discrete memory sections of integrated circuitry, said discrete memory sections being separated by street area formed in a matrix of rows and columns;
• discrete programmable logic arrays formed on the street area, each of said discrete programmable logic arrays being formed adjacent at least a respective one of said discrete memory sections;
• discretionary wires selectively connecting respective ones of said discrete programmable logic arrays to corresponding ones of said discrete memory sections, said discretionary wires extending from respective ones of said discrete memory sections to at least one of said discrete programmable logic arrays;
• and
• wherein each of said programmable logic arrays has storage circuitry redundant to respective ones of said discrete memory sections.

A method of fabricating electronic devices, the method comprising the steps of:

• patterning integrated circuits with a space between adjacent ones of the integrated circuits;
• forming at least one auxiliary component in said space;
• and
• selectively coupling said auxiliary component to at least one defective integrated circuit;
• wherein said auxiliary component has circuit elements used by the defective integrated circuit to function as an operable integrated circuit.

A process of manufacturing a semiconductor wafer, the process comprising the steps of:

• forming discrete memory sections of integrated circuitry, the discrete memory sections being separated by street area formed in a matrix of row s and columns;
• forming discrete programmable logic arrays on the street area, each of said discrete programmable logic arrays being formed adjacent at least a respective one of said discrete memory sections;
• selectively connecting respective ones of said discrete programmable logic arrays to corresponding ones of said discrete programmable logic arrays by discretionary wiring extending from respective ones of said discrete memory sections to at least one of said discrete programmable logic arrays;
• testing each of said discrete memory sections to determine the presence of a defect in the discrete memory sections;
• and
• replacing defective portions of said discrete memory sections with ones of said discrete programmable logic arrays operable to replace defective portions of a discrete memory section.