Method and circuit configuration for read-write mode control of a synchronous memory
AssigneeInfineon Technologies AG
InventorsStefan Dietrich, Sabine Schoniger, Peter Schrogmeier, Christian Weis
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Abstract
A read-write mode control method is described in which a waiting time during a reading process can be shortened by conducting a read instruction with auto-precharging in a first circuit part. The first circuit part is separate from a second circuit part used for conducting the write instruction, since a memory controller does not need to insert any wait cycles between a write instruction and an associated activate signal.
Claims6
A method for read-write mode control of synchronous memories, including synchronous dynamic random access memories (SDRAMs) and synchronous graphics random access memories (SGRAMs), which comprises the steps of:
- providing a synchronous memory having separate signal paths running in the synchronous memory for auto-precharging for a reading process and for the auto-precharging for a writing process;
- and
- setting an internal propagation time of an auto-precharging process for the writing process different than the internal propagation time for the reading process so that the auto-precharging is supplied as early as possible to a memory cell in a read operation.
A circuit configuration for read-write mode control of a synchronous memory, including synchronous dynamic random access memories (SDRAMs) and synchronous graphics random access memories (SGRAMs), the circuit configuration comprising:
- a first circuit part for conducting and generating a first auto-precharging signal for a reading process;
- a second circuit part for conducting and generating a second auto-precharging signal for a writing process;
- and
- a multiplexer connected to said first circuit part and said second circuit part, said multiplexer combining the first auto-precharging signal and the second auto-precharging signal which were generated and conducted separately, in temporally separated positions for supplying an auto-precharge signal to a memory cell without wait cycles during the reading process.
Dependencies are inferred from the claim text.