Nonvolatile memory and its driving method
AssigneeRohm Co., Ltd.
InventorYoshikazu Fujimori
Life of this patent
Estimating the term…
Loading patent…
AssigneeRohm Co., Ltd.
InventorYoshikazu Fujimori
Estimating the term…
A nonvolatile memory in which transistors having MFMIS structure each of which is composed by sequentially laminating a floating-gate, a ferroelectric layer and a control gate via a gate insulating film on the surface of a semiconductor substrate between a source area and a drain area formed on the semiconductor substrate are arrayed in a matrix, wherein the control gate is connected to a word line, said source area is connected to a source line and said drain area is connected to a drain line; a floating line composed of writing gates composed so that a capacitor is formed between the writing gate and said floating-gate is provided; a word line and a source line on the same line in said matrix are connected in common;a drain line and a floating line in the same column in said matrix are connected in common; and source/drain voltage and gate voltage can be independently set.
A nonvolatile memory in which transistors having MFMIS structure each of which is composed by sequentially laminating a floating-gate, a ferroelectric layer and a control gate via a gate insulating film on the surface of a semiconductor substrate between a source area and a drain area formed on the semiconductor substrate are arrayed in a matrix, wherein:
A nonvolatile memory, wherein:
A nonvolatile memory in which ferroelectric transistors each of which is formed by laminating a gate electrode via at least a first ferroelectric layer on the surface of a semiconductor substrate between a source area and a drain area formed on the semiconductor substrate are arrayed in a matrix, wherein:
A method of driving a nonvolatile memory in which ferroelectric transistors each of which is formed by laminating a gate electrode via at least a first ferroelectric layer on the surface of a semiconductor substrate between a source area and a drain area formed on the semiconductor substrate are arrayed in a matrix;
Dependencies are inferred from the claim text.