Input circuit and semiconductor integrated circuti having the input circuit
AssigneeFujitsu Limited
InventorsKENICHI KAWASAKI, YASUHARU SATO, YASUROU MATSUZAKI, TAKAAKI SUZUKI
Life of this patent
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Abstract
An input circuit has an input buffer and a detection circuit. The input buffer receives an external signal and outputs an internal signal. The detection circuit detects whether or not the external signal is provided. The input buffer outputs the internal signal when an output of the detection circuit indicates that the external signal is provided. This arrangement shortens the lock-on time of an internal circuit (synchronous circuit).
Claims54
An input circuit comprising:
- an input buffer for receiving an external signal and outputting an internal signal;
- and
- a detection circuit for detecting whether or not the external signal is provided, wherein said input buffer outputs the internal signal when an output of said detection circuit indicates that the external signal is provided.
A semiconductor integrated circuit having an input circuit for receiving an external clock signal and outputting an internal clock signal, and an internal circuit that receives the internal clock signal and spends a predetermined time to establish a steady state, wherein said input circuit comprises:
- an input buffer for generating the internal clock signal from the external clock signal;
- and
- a detection circuit for detecting whether or not the external clock signal is provided, wherein said input buffer outputs the internal clock signal when an output of said detection circuit indicates that the external clock signal is provided.
An input circuit comprising:
- an input buffer for receiving an external control signal and providing an internal control signal;
- and
- a timing signal generator for generating a timing signal, wherein:
- said input buffer provides the internal control signal for a predetermined period in response to the timing signal.
A semiconductor integrated circuit comprising:
- an input circuit for receiving an external clock signal and providing an internal clock signal;
- and
- an internal circuit that receives the internal clock signal and takes a predetermined time to establish a steady state, wherein:
- said input circuit includes an input buffer for generating the internal clock signal from the external control signal and a timing signal generator for generating a timing signal;
- and
- said input buffer provides the internal clock signal for a predetermined period in response to the timing signal.
An input circuit comprising:
- an input buffer for receiving an external control signal and providing an internal control signal;
- a timing signal generator for generating a timing signal;
- and
- a control signal detection circuit for providing a detection signal indicating whether or not the external control signal is activated, wherein said input buffer provides the internal control signal according to the timing signal and the detection signal.
A semiconductor integrated circuit comprising:
- an input circuit for receiving an external clock signal and providing an internal clock signal;
- and
- an internal circuit that receives the internal clock signal and takes a predetermined time to establish a steady state, wherein:
- said input circuit includes an input buffer for providing the internal clock signal according to the external clock signal, a timing signal generator for generating a timing signal, and a clock signal detection circuit for providing a detection signal indicating whether or not the external clock signal is activated;
- and
- said input buffer provides the internal clock signal according to the timing signal and the detection signal.
An input circuit comprising:
- an input buffer for receiving an external control signal and providing an internal control signal;
- a timing signal generator for generating a timing signal;
- and
- a control signal detection circuit for providing a detection signal indicating whether or not the external control signal is activated, wherein:
- said input buffer provides the internal control signal according to the timing signal and the detection signal;
- and
- the internal control signal is started and stopped in response to the timing signal.
A semiconductor integrated circuit comprising:
- an input circuit for receiving an external clock signal and providing an internal clock signal;
- and
- an internal circuit that receives the internal clock signal and takes a predetermined time to establish a steady state, wherein:
- said input circuit includes an input buffer for providing the internal clock signal according to the external clock signal, a timing signal generator for generating a timing signal, and a clock signal detection circuit for providing a detection signal indicating whether or not the external clock signal is activated;
- said input buffer provides the internal clock signal according to the detection signal;
- and
- the internal clock signal is started and stopped in response to the timing signal.
Dependencies are inferred from the claim text.