Frame for semiconductor package
AssigneeDainippon Printing Co., Ltd.
InventorsChikao Ikenaga, Kouji Tomita
Life of this patent
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AssigneeDainippon Printing Co., Ltd.
InventorsChikao Ikenaga, Kouji Tomita
Estimating the term…
Frame F comprises plural lead frames 10 arranged through grid-leads L in matrix. Semiconductor devices are mounted on individual lead frames 10 of frame F, respectively and collectively molded with molding compound. Thereafter, the collectively molded semiconductor devices are cut at grid-leads L by means of dicing saw so that individual semiconductor packages are obtained. The frame F further has groove portions. The groove portions are formed by half-cutting by etching a metal of frame F from the front or back at areas corresponding to grid-leads, so that grid-frames are made thin. When a width of groove portions is larger than a width of dicing saw, cut burrs are reduced. When a width of groove portions is smaller than a width of dicing saw, the occurrence of metal powder dusts is restrained and time required for cutting becomes smaller.
A frame for semiconductor package comprising plural lead frames arranged in matrix through grid-leads, in which individual semiconductor devices are mounted on the individual lead frames, respectively, the semiconductor devices are collectively molded with molding compound and the collectively molded semiconductor devices are cut at grid-leads by means of dicing saw to obtain individual semiconductor packages, wherein the grid-leads are provided with groove portions in such a manner that thin grid-leads are formed.
Dependencies are inferred from the claim text.