Process of forming a thick oxide field effect transistor
AssigneeInternational Business Machines Corporation
InventorsMichael J. Hargrove, Mario M. Pelella, Steven H. Voldman
Life of this patent
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Abstract
A SOI field effect transistor structure providing ESD protection. The structure has a source, a drain, a body, and a gate. The gate is formed from a thick oxide layer and a metal contact. The gate is formed during the BEOL process. The transistor may be a p-type transistor or an n-type transistor. The transistor may have its drain tied to either the gate, the body, or both the gate and body. When used as a protection device, the drain is tied to a signal pad and the source is tied to a potential reference.
Claims20
A silicon-on-insulator field effect transistor for electrostatic discharge protection comprising:
- a source providing a first terminal,
- a drain providing a second terminal,
- a body providing a third terminal, and
- a gate formed from a thick oxide layer and a metal contact, the gate providing a fourth terminal,
- wherein the gate is formed during a back-end-of-the-line process.
A silicon-on-insulator network receiving signals from a signal pad, comprising
- at least one field effect transistor having a source, a drain, a body, and a thick oxide gate, the drain, body, and gate tied together,
- a first terminal coupled to the drain,
- a second terminal coupled to the source, and
- the signal pad coupled to one of the first terminal and second terminal,
- wherein the transistor is responsive to the received signals for providing electrostatic discharge protection from the received signals by only generating voltages within a predetermined range of voltages.
A process for forming a thick oxide field effect transistor comprising the steps of:
- a) providing a silicon-on-insulator structure having a semiconductor island formed by shallow trench isolation, wherein the semiconductor island is of a first conductivity type;
- b) forming a separate source region and a separate drain region in the semiconductor island with a dopant having a second conductivity type, wherein a remaining region of the first conductivity type is a body region;
- c) forming an insulating layer above the semiconductor island;
- d) etching the insulating layer to form a thick oxide gate region above the body region;
- and
- e) forming metal leads to contact the source, drain, body, and gate regions.
A silicon-on-insulator network receiving signals from a signal pad, comprising
- at least one silicon-on-insulator thick oxide transistor responsive to said signals for electrostatic discharge protection.
Dependencies are inferred from the claim text.