Semiconductor device and manufacturing method thereof
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHideomi Suzawa, Koji Ono, Toru Takayama, Tatsuya Arao, Shunpei Yamazaki
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AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHideomi Suzawa, Koji Ono, Toru Takayama, Tatsuya Arao, Shunpei Yamazaki
Estimating the term…
There has been a problem that the manufacturing process is complicated and the number of processes is increased when a TFT with an LDD structure or a TFT with a GOLD structure is formed. In a method of manufacturing a semiconductor device, after low concentration impurity regions (24,25) are formed in a second doping process, a width of the low concentration impurity region which is overlapped with the third electrode (18c) and a width of the low concentration impurity region which is not overlapped with the third electrode can be freely controlled by a fourth etching process. Thus, in a region overlapped with the third electrode, a relaxation of electric field concentration is achieved and then a hot carrier injection can be prevented. And, in the region which is not overlapped with the third electrode, the off-current value can be suppressed.
A semiconductor device comprising a semiconductor layer formed on an insulating surface, an insulating film formed on said semiconductor layer, and a gate electrode formed on said insulating film,
A method of manufacturing a semiconductor device comprising steps of:
A method of manufacturing a semiconductor device comprising steps of:
A method of manufacturing a semiconductor device comprising steps of:
A method of manufacturing a semiconductor device comprising steps of:
A method of manufacturing a semiconductor device comprising steps of:
Dependencies are inferred from the claim text.