Method and apparatus for self timing refresh
OwnerZohar Bogin, David D Lent +1inventors
InventorsZOHAR BOGIN, DAVID D LENT, VINCENT VON BOKERN
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Abstract
According to one embodiment, the present invention discloses a computer system that includes a memory and a memory controller. The memory controller includes a refresh timing circuit that generates clock pulses. The clock pulses are used to trigger memory refresh events. According to a further embodiment, the refresh timing circuit includes a clock generator, a counter coupled to the clock generator and a storage register coupled to the clock generator and counter. Further, the refresh timing circuit includes a comparator coupled to the clock generator, the counter and the storage register.
Claims37
A computer system comprising:
- a memory;
- and
- a memory controller, wherein the memory controller includes a refresh timing circuit for generating clock pulses used to trigger memory refresh events.
An Extended Data Out Dynamic Random Access Memory (EDO DRAM) controller comprising:
- a refresh timing circuit for generating clock pulses used to trigger memory refresh events.
A method of calibrating a refresh timer in a computer system, the method comprising:
- counting a first set of clock pulses received at a counter from a clock generator;
- receiving a signal indicating that a memory refresh event has been triggered;
- and
- storing a first count representing the number of clock cycles received at the counter before receiving the signal.
In a computer system having a normal mode of operation and a low power mode of operation, a method of triggering a memory refresh event while the computer system is operating in the low power mode, the method comprising:
- transmitting a frequency value to a comparator, the frequency value representing the frequency at which to trigger memory refresh events;
- transmitting a first clock pulse count to the comparator;
- determining whether the first clock pulse count is equal to the frequency value;
- and
- transmitting a first refresh signal.
Dependencies are inferred from the claim text.