Multi-chip module having interconnect dies

A multi-chip module for housing multiple integrated circuit dies comprising:

• a housing including a plurality of insulative side walls and an end plate, said end plate joined to the side walls to define a cavity;
• a plurality of electrically conductive leads held in said side walls, each of said conductive leads including an internal lead section extending within the cavity and an external lead section extending outside of said housing;
• a plurality of integrated circuit dies mounted to said end plate within the cavity;
• a plurality of interconnect dies mounted to said end plate within the cavity, each said interconnect die positioned adjacent to at least two of said plurality of integrated circuit dies;
• and
• electrically conductive material electrically connecting said electrically conductive leads, said integrated circuit dies, and said interconnect dies.

A multi-chip module for housing multiple integrated circuit dies comprising:

• a housing including a plurality of insulative side walls and an end plate joined to the side walls to define a cavity;
• a plurality of electrically conductive leads held in said side walls, each of said conductive leads including an internal lead section extending within the cavity and an external lead section extending outside of said housing;
• first, second, third, and fourth integrated circuit dies mounted to said end plate within the cavity;
• first, second, third and fourth interconnect dies mounted to said end plate within the cavity, said first interconnect die mounted between said first and second integrated circuit dies, said second interconnect die mounted between said second and third integrated circuit dies, said third interconnect die mounted between said third and fourth integrated circuit dies, and said fourth interconnect die mounted between said first and fourth integrated circuit dies;
• and
• electrically conductive material coupling said conductive leads and said interconnect dies, said conductive leads and said integrated circuit dies, and said integrated circuit dies and said interconnect dies.