US 2001/0040481 A1Published application

Radio communication apparatus and radio frequency power amplifier

AssigneeHitachi, Ltd.

InventorsHirotaka Ueno, Yasuhiro Nunogawa, Tetsuaki Adachi

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Abstract

To reduce power consumption by increasing amplifying efficiency in a low power mode, there is provided a radio communication apparatus in which each of field effect transistors of a radio frequency power module in a multi-stage configuration is controlled by an APC circuit based on a power level instruction signal, and in which a correction circuit is incorporated between the gate of a final stage transistor and the APC circuit to apply a linear gate voltage to the final stage transistor when a High level signal based on the power level instruction signal is applied and to provide a maximum gate voltage of the final stage transistor which is equal to or lower than the gate voltages of other transistors and whose rate of increase relative to the output voltage of the APC circuit gradually reduces when a Low level signal based on the power instruction signal is applied. A high power mode is enabled when the output voltage of the APC circuit is equal to or higher than a prescribed voltage, and a low power mode is enabled when it is lower than the prescribed voltage.

Claims38

Dependent claims

A semiconductor amplifier circuit comprising:

a plurality of semiconductor amplifying elements each having a first terminal, a second terminal and a control terminal;
an input terminal;
an output terminal;
a first power supply terminal;
a second power supply terminal;
a bias supply terminal:
an output control circuit;
and
an output mode instruction terminal;
wherein
said plurality of semiconductor amplifying elements comprise a first semiconductor amplifying element and a second semiconductor amplifying element;
said semiconductor elements having a configuration in which said first semiconductor amplifying element is supplied with a signal in response to a signal supplied to said input terminal and supplied with a bias at a predetermined level from said bias supply terminal at the control terminal thereof, is connected to said first power supply terminal at the first terminal thereof and is connected to said second power supply terminal at the second terminal thereof, in which said second semiconductor amplifying element is electrically connected to the first terminal of said first semiconductor amplifying element and connected to said bias supply terminal at the control terminal thereof, is connected to said first power supply terminal and said output terminal at the first terminal thereof and is connected to said second power supply terminal at the second terminal thereof such that a current flowing between the first and second terminals of said first semiconductor amplifying element is smaller than a current flowing between the first and second terminals of said second semiconductor amplifying element;
and wherein
said output control circuit is connected between the control terminal of said second semiconductor amplifying element and said bias supply terminal for controlling the level of the bias supplied to the control terminal of said second semiconductor amplifying element to limit the output of said semiconductor amplifier circuit to a predetermined level in a first output mode and for controlling the level of the bias supplied to the control terminal of said second semiconductor amplifying element in accordance with the output of said semiconductor amplifier circuit in a second output mode.

11 more elements

A semiconductor amplifier circuit comprising:

a plurality of semiconductor amplifying elements each having a first terminal, a second terminal and a control terminal;
an input terminal;
an output terminal;
a first power supply terminal;
a second power supply terminal;
a bias supply terminal:
an output control circuit;
and
an output mode instruction terminal;
wherein
said plurality of semiconductor amplifying elements comprise a first semiconductor amplifying element and a second semiconductor amplifying element;
said first semiconductor amplifying element being supplied with a signal in response to a signal supplied to said input terminal and supplied with a bias at a predetermined level from said bias supply terminal at the control terminal thereof, connected to said first power supply terminal at the first terminal thereof and connected to said second power supply terminal at the second terminal thereof;
and
said second semiconductor amplifying element being electrically connected to the first terminal of said first semiconductor amplifying element and connected to said output control circuit at the control terminal thereof, connected to said first power supply terminal and said output terminal at the first terminal thereof and connected to said second power supply terminal at the second terminal thereof;
and wherein
said output control circuit is connected between the control terminal of said second semiconductor amplifying element and said bias supply terminal for controlling the level of the bias supplied to the control terminal of said second semiconductor amplifying element at a constant value in a first output mode and for controlling the level of the bias supplied to the control terminal of said second semiconductor amplifying element in accordance with the output of said semiconductor amplifier circuit in a second output mode.

13 more elements

A semiconductor amplifier circuit comprising:

a plurality of semiconductor amplifying elements having a first terminal, a second terminal and a control terminal;
an input terminal;
an output terminal;
a first power supply terminal;
a second power supply terminal;
a first bias supply terminal;
and
a second bias supply terminal;
wherein
said plurality of semiconductor amplifying elements comprise a first semiconductor amplifying element and a second semiconductor amplifying element;
said first semiconductor amplifying element being supplied with a signal in response to a signal supplied to said input terminal and supplied with a bias at a predetermined level from said first bias supply terminal at the control terminal thereof, connected to said first power supply terminal at the first terminal thereof and connected to said second power supply terminal at the second terminal thereof;
and
said second semiconductor amplifying element being electrically connected to the first terminal of said first semiconductor amplifying element and connected to said second bias supply terminal at the control terminal thereof, connected to said first power supply terminal and said output terminal at the first terminal thereof and connected to said second power supply terminal at the second terminal thereof;
whereby controlling the level of the bias supplied by said second bias supply terminal at a constant value in a first output mode and controlling the level of the bias supplied by the second bias supply terminal in accordance with the output of said semiconductor amplifier circuit in a second output mode.

11 more elements

A radio communication apparatus comprising:

an automatic power control circuit;
and
a semiconductor amplifier circuit for controlling the level of output with a power level instruction signal for instructing said automatic power control circuit of an output level and a mode signal output by said automatic power control circuit;
wherein
said semiconductor amplifier circuit comprises:
a plurality of semiconductor amplifying elements having a first terminal, a second terminal and a control terminal;
an input terminal;
an output terminal;
a first power supply terminal;
a second power supply terminal;
a bias supply terminal:
an output control circuit;
and
an output mode instruction terminal,
said plurality of semiconductor amplifying elements comprising a first semiconductor amplifying element and a second semiconductor amplifying element;
said semiconductor elements having a configuration in which said first semiconductor amplifying element is supplied with a signal in response to a signal supplied to said input terminal and supplied with a bias at a predetermined level from said bias supply terminal at the control terminal thereof, is connected to said first power supply terminal at the first terminal thereof and is connected to said second power supply terminal at the second terminal thereof, and in which said second semiconductor amplifying element is electrically connected to the first terminal of said first semiconductor amplifying element and connected to said bias supply terminal at the control terminal thereof, is connected to said first power supply terminal and said output terminal at the first terminal thereof and is connected to said second power supply terminal at the second terminal;
and
said output control circuit being connected between the control terminal of said second semiconductor amplifying element and said bias supply terminal for controlling the level of the bias supplied to the control terminal of said second semiconductor amplifying element to limit the output of said semiconductor amplifier circuit to a predetermined level in a first output mode and for controlling the level of the bias supplied to the control terminal of said second semiconductor amplifying element in accordance with the output of said semiconductor amplifier circuit in a second output mode.

15 more elements

A radio communication apparatus comprising:

a semiconductor amplifier circuit;
an automatic power control circuit;
and
a power level instruction signal for instructing said automatic power control circuit of an output level;
wherein
said semiconductor amplifier circuit comprises:
a plurality of semiconductor amplifying elements having a first terminal, a second terminal and a control terminal;
an input terminal;
an output terminal;
a first power supply terminal;
a second power supply terminal;
a first bias supply terminal;
and
a second bias supply terminal,
said plurality of semiconductor amplifying elements comprising a first semiconductor amplifying element and a second semiconductor amplifying element;
said first semiconductor amplifying element being supplied with a signal in response to a signal supplied to said input terminal and supplied with a bias at a predetermined level from said first bias supply terminal at the control terminal thereof, connected to said first power supply terminal at the first terminal thereof and connected to said second power supply terminal at the second terminal thereof;
and
said second semiconductor amplifying element being electrically connected to the first terminal of said first semiconductor amplifying element and connected to said second bias supply terminal at the control terminal thereof, connected to said first power supply terminal and said output terminal at the first terminal thereof and connected to said second power supply terminal at the second terminal thereof;
whereby controlling the level of the bias supplied by said second bias supply terminal at a constant value in a first output mode and controlling the level of the bias supplied by the second bias supply terminal in accordance with the output of said semiconductor amplifier circuit in a second output mode.

16 more elements

A semiconductor amplifier circuit comprising:

a plurality of semiconductor amplifying elements each having a first terminal, a second terminal and a control terminal;
an input terminal;
an output terminal;
a first power supply terminal;
a second power supply terminal;
a bias supply terminal:
an output control circuit;
and
an output mode instruction terminal;
wherein
said plurality of semiconductor amplifying elements comprise a semiconductor amplifying element at a first stage and a semiconductor amplifying element at an output stage,
said semiconductor elements having a configuration in which said semiconductor amplifying element at the first stage is supplied with a signal in response to a signal supplied to said input terminal and supplied with a bias at a predetermined level from said bias supply terminal at the control terminal thereof, is connected to said first power supply terminal at the first terminal thereof and is connected to said second power supply terminal at the second terminal thereof, and in which said semiconductor amplifying element at the output stage is electrically connected to the first terminal of said semiconductor amplifying element at the first stage and connected to said bias supply terminal at the control terminal thereof, is connected to said first power supply terminal and said output terminal at the first terminal thereof and is connected to said second power supply terminal at the second terminal thereof such that a current flowing between the first and second terminals of said semiconductor amplifying element at the first stage is smaller than a current flowing between the first and second terminals of said semiconductor amplifying element at the output stage;
and wherein
said output control circuit is connected between the control terminal of said semiconductor amplifying element at the output stage and said bias supply terminal for controlling the level of the bias supplied to the control terminal of said semiconductor amplifying element at the output stage to limit the output of said semiconductor amplifier circuit to a predetermined level in a first output mode and for controlling the level of the bias supplied to the control terminal of said semiconductor amplifying element at the output stage in accordance with the output of said semiconductor amplifier circuit in a second output mode.

11 more elements

Dependencies are inferred from the claim text.

Facts

Application: 09/881,013Filed 15 Jun 2001
Priority: JP 10-24470931 Aug 1998
Published: 15 Nov 2001
Term ends: Not estimatedThe source records don’t support an estimate.

Classification4 codes

H03G 3/3042
In high-frequency amplifiers or in frequency-changers: in modulators, frequency-changers, transmitters or power amplifiers
H03G 1/0088
Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal: using discontinuously variable…
H03G 3/3047
In modulators, frequency-changers, transmitters or power amplifiers: for intermittent signals, e.g. burst signals
H03G
Control of amplification

Family

Application09/385,690Continuation · filed 30 Aug 1999
Application09/722,563Continuation · filed 28 Nov 2000
Application09/881,013Continuation · filed 15 Jun 2001
US 6,172,567 B2Related patent
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US 2001/0040481 A1This patent

From the US filing history. Foreign family members aren’t listed.