US 2001/0040466 A1 · HIGH SPEED LOW VOLTAGE DIFFERENTIAL SIGNAL DRIVER HAVING REDUCED PULSE WIDTH DISTORTION

Abstract

A driver circuit for transmitting a signal by switching the direction of a signal current which flows on a pair of transmission lines. The drains of field effect transistors having the opposite polarities are connected to each other so as to constitute first and second switching means as well as first switching means. One of differential driving signals is input to the gate terminal of each of the field effect transistors constituting the first switching means, while the drain terminal is connected to one of the transmission line pair. The other of the differential driving signals is input to the gate terminal of each of the field effect transistors constituting the second switching means, while the drain terminal is connected to the other of the transmission line pair.

Claims13

Dependent claims

A driver circuit for transmitting a signal by switching the direction of a signal current which flows on a pair of transmission lines on the basis of differential driving signals, said driver circuit comprising:

a first switching means and a second switching means respectively constituted by field effect transistors which have the opposite polarities and the drains of which are connected to each other,
wherein one of said differential driving signals is input to the gate of each of said field effect transistors constituting said first switching means, while the drains thereof are connected to one of said transmission line pair;
and
the other of said differential driving signals is input to the gate of each of said field effect transistors constituting said second switching means, while the drains thereof are connected to the other of said transmission line pair.

1 more element

A driver circuit for transmitting a signal by switching the direction of a signal current which flows on a pair of transmission lines, said driver circuit comprising:

a pair of PMOS transistors as current switching elements on the high-potential side;
a pair of NMOS transistors as current switching elements on the low-potential side;
and
a control signal generator for generating a positive phase control signal which drives a first PMOS transistor of said PMOS transistor pair and a first NMOS transistor of said NMOS transistor pair and inputting said positive phase control signal to the gates of each of said first transistors, and generating a negative phase control signal which drives a second PMOS transistor of said PMOS transistor pair and a second NMOS transistor of said NMOS transistor pair and inputting said negative phase control signal to the gates of each of said second transistors;
wherein the drain of said first PMOS transistor is connected to the drain of said first NMOS transistor, and one of said transmission lines is connected to the portion at which said drains are connected to each other;
and
the drain of said second PMOS transistor is connected to the drain of said second NMOS transistor, and the other of said transmission lines is connected to the portion at which said drains are connected to each other.

4 more elements

Dependencies are inferred from the claim text.

High speed low voltage differential signal driver having reduced pulse width distortion

Life of this patent

High speed low voltage differential signal driver having reduced pulse width distortion

Life of this patent

Abstract

Claims13