Information processing device

Abstract

An information processing device which is simplified in hardware and software configuration. A central processing section controls individual parts of the device and executes predetermined processes in accordance with programs. A first semiconductor memory stores programs executed by the central processing section as well as data derived in the middle of processing. A bus interconnects the central processing section, the first semiconductor memory, and selective connection means. The selective connection means selects either a second or third semiconductor memory by making reference to a selection register, and connects the selected memory to the bus. In accordance with the settings of a transfer register, transfer means transfers data between the first semiconductor memory and the second or third semiconductor memory. The second semiconductor memory stores system firmware etc., while the third semiconductor memory stores data newly generated as a result of the processing by the central processing section, etc.

Dependencies are inferred from the claim text.