Interrupt throttling for inter-processor communications
AssigneeTexas Instruments Incorporated
InventorAndrew J. Gardner
Life of this patent
Estimating the term…
Abstract
Implementation of communication between data processors includes a first task (A) running on a first data processor (11) determining that communication is desired between the first task and a second task (B) running on a second data processor (13). The first data processor interrupts the second data processor if the second task is blocked with respect to communication on a predetermined communication channel. If the second task is not blocked with respect to communication on the predetermined communication channel, the first data processor participates in the desired communication on the predetermined communication channel without interrupting the second data processor.
Claims31
A method for implementing communication between data processors, comprising:
- a first task running on a first data processor determining that communication is desired between the first task and a second task running on a second data processor;
- the first data processor determining whether the second task is blocked with respect to communication on a predetermined communication channel;
- if the second task is blocked with respect to communication on the predetermined communication channel, the first data processor interrupting the second data processor to inform the second data processor of the desired communication and thereafter participating in the desired communication on the predetermined communication channel;
- and
- if the second task is not blocked with respect to communication on the predetermined communication channel, the first data processor participating in the desired communication on the predetermined communication channel without interrupting the second data processor.
A data processing system, comprising:
- a first data processor;
- a second data processor coupled to said first data processor for permitting communication therebetween;
- said first data processor including a device driver for implementing a desired communication between a first task running on said first data processor and a second task running on said second data processor;
- a communication port coupled to said device driver for permitting said device driver to access a communication channel for the desired communication, said communication port further for permitting said device driver to receive information indicative of whether the second task is blocked with respect to communication on said communication channel;
- and
- said device driver including logic responsive to a blocked indication for outputting to said second data processor via said communication port an interrupt signal to inform said second data processor of the desired communication, said logic responsive to an indication that the further task is not blocked for permitting said device driver to participate in the desired communication on said communication channel without outputting said interrupt signal to said second data processor.
A data processing apparatus, comprising:
- a device driver for implementing a desired communication between a task running on the data processing apparatus and a further task running on a further data processing apparatus;
- a communication port coupled to said device driver for permitting said device driver to access a communication channel on which the desired communication can occur, said communication port further for permitting said device driver to receive information indicative of whether the further task is blocked with respect to communication on said communication channel;
- and
- said device driver including logic responsive to a blocked indication for outputting to the further data processing apparatus an interrupt signal to inform the further data processing apparatus of the desired communication, said logic responsive to an indication that the further task is not blocked for permitting said device driver to participate in the desired communication on said communication channel without outputting said interrupt signal to the further data processing apparatus.
Dependencies are inferred from the claim text.