Semiconductor processing methods and integrated circuitry

A semiconductor processing method comprising:

• forming an electrically insulative layer over a substrate;
• forming an opening within the electrically insulative layer, the opening having a periphery defined at least in part by a bottom surface and a sidewall surface;
• forming a first layer comprising TiN within the opening, the first layer being over the bottom surface and along the sidewall surface;
• forming a second layer comprising elemental Ti over the electrically insulative layer but substantially not within the opening, the second layer having a thickness of less than 50 Å along the sidewall surface and over the bottom surface;
• and
• forming an aluminum-comprising layer within the opening and over the second layer.

A semiconductor processing method comprising:

• forming an electrically insulative layer over a substrate;
• forming an opening within the electrically insulative layer, the opening having a periphery defined at least in part by a bottom surface and a sidewall surface;
• forming a first layer comprising TiN within the opening, the first layer being over the bottom surface and along the sidewall surface;
• forming a second layer comprising elemental Ti over the electrically insulative layer and over the bottom of the opening, the second layer substantially not being along a predominate portion of the sidewall surface, the second layer having a thickness of less than 75 Å along a predominate portion of the sidewall surface and a thickness of at least about 100 Å over the bottom surface;
• and
• forming an aluminum-comprising layer within the opening and over the second layer.

A semiconductor processing method comprising:

• forming a first aluminum-comprising layer over an electrically insulative layer;
• forming a first titanium-comprising layer over the first aluminum-comprising layer;
• forming a second titanium-comprising layer over the first titanium-comprising layer, one of the first and second titanium-comprising layers comprising elemental Ti and the other of the first and second titanium-comprising layers comprising TiN;
• and
• forming a second aluminum-comprising layer over the second titanium-comprising layer.

A semiconductor processing method comprising:

• forming an electrically insulative layer over a silicon-comprising substrate;
• forming an opening within the electrically insulative layer and extending to the substrate, the opening having a periphery defined in part by a bottom surface;
• forming a titanium-silicide layer at the bottom surface;
• forming a first layer comprising TiN within the opening and over the titanium silicide;
• forming a second layer comprising elemental Ti over the first layer;
• forming a first aluminum-comprising layer within the opening and over the second layer, the aluminum-comprising layer contacting the second layer at the bottom surface;
• forming a third layer over the first aluminum-comprising layer, the third layer comprising one of elemental Ti or TiN;
• and
• forming a second aluminum-comprising layer over the third layer.

An integrated circuit comprising:

• an electrically insulative layer over a semiconductive substrate;
• an opening within the electrically insulative layer, the opening having a periphery defined at least in part by a bottom surface and a sidewall surface;
• a first layer within the opening and contacting both the bottom surface and the sidewall surface, the first layer comprising TiN;
• a second layer comprising elemental Ti over the electrically insulative layer but substantially not with the opening, the second layer having a thickness of less than 75 Å along the sidewall surface and over the bottom surface;
• and
• an aluminum-comprising layer within the opening and over the second layer.

An integrated circuit comprising:

• an electrically insulative layer over a semiconductive substrate;
• an opening within the electrically insulative layer, the opening having a periphery defined at least in part by a bottom surface and a sidewall surface;
• a first layer within the opening and contacting both the bottom surface and the sidewall surface, the first layer comprising TiN;
• a second layer comprising elemental Ti over the electrically insulative layer and over the bottom of the opening, the second layer substantially not being along a predominate portion of the sidewall surface, the second layer having a thickness of less than 75 Å along a predominate portion of the sidewall surface and a thickness of at least about 100 Å over the bottom surface;
• and
• an aluminum-comprising layer within the opening and over the second layer.

An integrated circuit comprising:

• a first aluminum-comprising layer over an electrically insulative layer;
• a first titanium-comprising layer over the first aluminum-comprising layer;
• a second titanium-comprising layer over the first titanium-comprising layer, one of the first and second titanium-comprising layers comprising elemental Ti and the other of the first and second titanium-comprising layers comprising TiN;
• and
• a second aluminum-comprising layer over the second titanium-comprising layer.

A integrated circuit comprising:

• a silicon-comprising substrate;
• an electrically insulative layer over the substrate;
• an opening within the electrically insulative layer, the opening extending to the substrate and having a periphery defined in part by a bottom surface;
• a titanium-silicide layer at the bottom surface;
• a first layer comprising TiN within the opening and over the titanium silicide layer;
• a second layer comprising elemental Ti over the first layer;
• a first aluminum-comprising layer within the opening and over the second layer, the aluminum-comprising layer contacting the second layer at the bottom surface;
• a third layer over the first aluminum-comprising layer, the third layer comprising one of elemental Ti or TiN;
• and
• a second aluminum-comprising layer over the third layer.