Method of manufacturing a semiconductor and semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorsTakeo Nakayama, Akira Hokazono
Life of this patent
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Abstract
A shallow impurity diffusion layer adjacent to a gate electrode is formed by forming a side-wall insulating film of the gate electrode twice, and a MOS transistor of the salicide type having improved short-channel effect is embodied. An impurity diffusion layer portion not adjacent to a gate electrode of a source/drain region is formed first by self-alignment with a first side-wall insulating film. After an impurity diffusion layer adjacent to the gate electrode is formed by self-alignment with the gate electrode, a second side-wall insulating film is formed. Silicide films are formed on the gate electrode and source/drain region by self-alignment with the second side-wall insulating film.
Claims21
A method of manufacturing a semiconductor device comprising the steps of:
- forming a gate electrode on a semiconductor substrate through a gate insulating film;
- forming a protective insulating film on a side-wall of the gate electrode;
- forming a first side-wall insulating film on the protective insulating film formed on the side-wall of the gate electrode;
- forming a first impurity diffusion layer on a surface of the semiconductor substrate by using the gate electrode and the first side-wall insulating film as a mask;
- removing the first side-wall insulating film after the step of forming the first impurity diffusion layer;
- forming a second impurity diffusion layer on the surface of the semiconductor substrate by using the gate electrode and the protective insulating film as a mask after the step of removing the first side-wall insulating film;
- forming a second side-wall insulating film on the protective insulating film formed on the side-wall of the gate electrode after the step of forming the second impurity diffusion layer;
- and
- forming a conductive film on an upper surface of the gate electrode and on a surface of the second impurity diffusion layer by using the second side-wall insulating film as a mask.
A semiconductor device comprising:
- a semiconductor substrate;
- a gate electrode formed through a gate insulating film on the semiconductor substrate;
- a side-wall insulating film formed on a side of the gate electrode;
- a first impurity diffusion layer formed with a first depth on a surface of the semiconductor substrate underneath the side-wall insulating film on the side of the gate electrode;
- a second impurity diffusion layer formed with a second depth on the surface of the semiconductor substrate adjacent to and connected to the first impurity diffusion layer, the second depth being deeper than the first depth;
- and
- a first conductive layer formed on a surface of the second impurity diffusion layer with an end closest to the gate electrode in contact with the outermost portion of a surface of the side-wall insulating film and formed to have a resistance lower than that of the second diffusion impurity layer;
- and
- wherein the shortest distance between the end of the conductive layer and an end of the second impurity diffusion layer on the side of the gate electrode is greater than a distance between a bottom of the conductive layer and a bottom of the second impurity diffusion layer.
Dependencies are inferred from the claim text.