Overflow detector for FIFO
AssigneeBroadcom Corporation
InventorJun Cao
Life of this patent
Estimating the term…
Abstract
The present invention provides an overflow detector for a FIFO. The FIFO includes a plurality of registers each having an input and an output, a plurality of write signals each respectively coupled to a clock, one of the plurality of registers, and a plurality of read switches each respectively coupled to an output of one of the plurality of registers, each of the plurality of read switches being controlled by a respective read signal. The overflow detector includes a plurality of clocked registers each of which is coupled to receive a write signal and its corresponding read signal, wherein each clocked register records a read signal and is clocked by the corresponding write signal.
Claims10
A first-in-first-out (FIFO) circuit comprising:
- a plurality of registers each having an input and an output;
- a plurality of write signals coupled to selectively apply an input signal to an input of any one of the plurality of registers;
- a plurality of read switches each respectively coupled to an output of one of the plurality of registers, each of the plurality of read switches being controlled by a respective one of a plurality of read signals;
- and
- an overflow detector having a plurality of clocked registers each of which is coupled to receive one of a plurality of write signals and a corresponding one of the plurality of read signals,
- wherein each clocked register records one of the plurality of read signals and is clocked by the corresponding write signal.
A method for detecting overflow in a first-in-first-out (FIFO) structure that uses read pointers and corresponding write pointers, the method comprising:
- recording each read pointer into a register clocked by its corresponding write pointer;
- and
- logically combining outputs of all registers.
Dependencies are inferred from the claim text.