Method for carrying out a burn-in process for electrically stressing a semiconductor memory
AssigneeInfineon Technologies AG
InventorsKamel Ayadi, Jurgen Lindolf, Nedim Oezoguz-Geissler
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Abstract
A circuit configuration is described that has a first voltage terminal, a second voltage terminal and a control input. A reference-ground potential is applied to the first voltage terminal and an operating voltage is applied to the second voltage terminal. The control input is supplied with a control voltage, the control voltage assumes voltage values which alternate between the reference-ground potential and the operating voltage. The alternation of the control voltage has the effect that components such as transistors and inverter that are present in the circuit configuration are active and thereby experience an accelerated aging process.
Claims8
A method for carrying out a burn-in process for electrically stressing semiconductor memories, which comprises the steps of:
- providing a memory having a circuit configuration with a first voltage terminal, a second voltage terminal, a control input, and a MOS transistor;
- applying a reference-ground potential to the first voltage terminal;
- applying a second voltage to the second voltage terminal;
- and
- applying a control voltage to the control input, and varying the control voltage.
Dependencies are inferred from the claim text.