Dual internal voltage generating apparatus
AssigneeHyundai Electronics Industries Co., Ltd.
InventorYoung-Nam Oh
Life of this patent
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Abstract
To accomplish low power consumption of a semiconductor memory device, an internal voltage generating apparatus of the present invention applies an internal power voltage having the lower potential level as an operation voltage of a chip. By differentiating the internal power voltage for each of a peripheral circuit and a core circuit within a DRAM to use them as an operational voltage of the cell, i.e., by supplying the lowered internal power voltage to the core circuit unit, the reliability of the cell and noise characteristic is improved.
Claims14
A dual internal voltage generating apparatus comprising;
- a reference potential generating means for generating a reference voltage having a predetermined potential level;
- a first and a second potential amplifying means, parallel to each other, for amplifying the reference voltage;
- a first reference potential converting means for converting the reference voltage to a first potential level by comparing a first bias voltage generated at a corresponding power voltage detector with the output voltage from the first potential amplifying means;
- a second reference potential converting means for converting the reference voltage to a second potential level by comparing a second bias voltage generated at a corresponding power voltage detector with the output voltage from the second potential amplifying means;
- a first driver means receiving the reference voltage generated at the first reference potential converting means for generating a first internal voltage to be supplied to a peripheral circuit means within a DRAM;
- and
- a second driver means receiving the reference voltage generated at the second reference potential converting means for generating a second internal voltage to be supplied to a core circuit means within the DRAM.
A dual internal voltage generator, comprising;
- a reference potential generator constructed and arranged to generate a reference voltage having a predetermined potential level;
- first and a second potential amplifiers, constructed and arranged in parallel with each other, to amplifying the reference voltage;
- a first reference potential converter constructed and arranged to convert the reference voltage to a first potential level by comparing a first bias voltage generated at a corresponding power voltage detector with the output voltage from the first potential amplifier;
- a second reference potential converter constructed and arranged to convert the reference voltage to a second potential level by comparing a second bias voltage generated at a corresponding power voltage detector with the output voltage from the second potential amplifier;
- a first driver constructed and arranged to receive the reference voltage generated at the first reference potential converter and generate a first internal voltage to be supplied to a peripheral circuit within a DRAM;
- and
- a second driver constructed and arranged to receive the reference voltage generated at the second reference potential converter and generate a second internal voltage to be supplied to a core circuit within the DRAM.
Dependencies are inferred from the claim text.