Method and apparatus for designing cipher logic, and a computer product
AssigneeFujitsu Limited
InventorTakeshi Shimoyama
Life of this patent
Estimating the term…
Abstract
An optimization processing unit optimizes an input and output bit number of an S-box based on parameters inputted from an input unit. The examples of the parameters are memory capacity of a primary cache memory, entire input and output bit number, and smallest input and output number of the S-box. An S-box generating unit generates an S-box in accordance with the optimized input and output bit number of the S-box. Then, an F-function generating unit generates an F-function by aligning a plurality of S-boxes thus generated.
Claims15
A cipher designing apparatus for designing cipher logic of a cipher device that effects cipher or decryption per block by using an F-function for converting input bits to output bits by means of a plurality of S-boxes, said cipher designing apparatus comprising:
- a selecting unit which selects an input and output bit number of said plurality of S-boxes based on a memory capacity of a high-speed referable memory provided to said cipher device;
- and
- a S-box generating unit which generates a plurality of S-boxes each having the input and output bit number selected by said selecting unit.
A cipher designing method for designing cipher logic of a cipher device that effects cipher or decryption per block by using an F-function for converting input bits to output bits by means of a plurality of S-boxes, the method comprising the steps of:
- selecting an input and output bit number of said plurality of S-boxes based on a memory capacity of a high-speed referable memory provided to said cipher device;
- and
- generating a plurality of S-boxes each having the input and output bit number selected at the input and output bit number selecting step.
A computer readable medium for storing instructions, which when executed by a computer, causes the computer to realizes a cipher designing method for designing cipher logic of a cipher device that effects cipher or decryption per block by using an F-function for converting input bits to output bits by means of a plurality of S-boxes, the method comprising the steps of:
- selecting an input and output bit number of said plurality of S-boxes based on a memory capacity of a high-speed referable memory provided to said cipher device;
- and
- generating a plurality of S-boxes each having the input and output bit number selected at said selecting step.
Dependencies are inferred from the claim text.