Liquid crystal display device having stabilized pixel electrode potentials

A liquid crystal display device comprising:

• a pair of opposing substrates;
• a liquid crystal layer sandwiched between said pair of opposing substrates;
• a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of said pair of opposing substrates;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween;
• and
• a plurality of pixel areas each having a pixel electrode and a switching element, and surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode being supplied with a video signal from a corresponding one of said plurality of drain signal lines via said switching element driven by a scanning signal supplied from a corresponding one of said plurality of gate signal lines,
• wherein a capacitance formed between said pixel electrode and said corresponding one of said plurality of gate signal lines is approximately equal to a capacitance formed between said pixel electrode and one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines.

A liquid crystal display device comprising:

• a pair of opposing first and second substrates;
• a liquid crystal layer sandwiched between said pair of opposing first and second substrates;
• a plurality of gate signal lines disposed on a surface of said first substrate on a liquid crystal layer side thereof;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween on said surface of said first substrate;
• and
• a plurality of pixel areas each having a pixel electrode and a switching element, and arranged in a matrix fashion surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode being supplied with a video signal from a corresponding one of said plurality of drain signal lines via said switching element driven by a scanning signal supplied from a corresponding one of said plurality of gate signal lines,
• wherein a following inequality is satisfied:
• (½)Cgs-s≦Cgs-n≦2Cgs-s
• where
• Cgs-s is a capacitance between said pixel electrode and said corresponding one of said plurality of gate signal lines, and
• Cgs-n is a capacitance between said pixel electrode and one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines.

A liquid crystal display device comprising:

• a pair of opposing substrates;
• a liquid crystal layer sandwiched between said pair of opposing substrates;
• a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of said pair of opposing substrates;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween;
• and
• a plurality of pixel areas each having a pixel electrode, a counter electrode adjacent to said pixel electrode and a switching element, and surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode and said counter electrode being arranged so as to generate therebetween an electric field having a component parallel to said surface of said one of said pair of opposing substrates,
• said pixel electrode being supplied with a video signal from a corresponding one of said plurality of drain signal lines via said switching element driven by a scanning signal supplied from a corresponding one of said plurality of gate signal lines,
• wherein a capacitance formed between said pixel electrode and said corresponding one of said plurality of gate signal lines is approximately equal to a capacitance formed between said pixel electrode and one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines, and a capacitance formed between said counter electrode and said corresponding one of said plurality of gate signal lines is approximately equal to a capacitance formed between said counter electrode and one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines.

A liquid crystal display device comprising:

• a pair of opposing first and second substrates;
• a liquid crystal layer sandwiched between said pair of opposing first and second substrates;
• a plurality of gate signal lines disposed on a liquid crystal layer side surface of said first substrate;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween;
• and
• a plurality of pixel areas each having a pixel electrode, a counter electrode adjacent to said pixel electrode and a switching element, and arranged in a matrix fashion surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode being supplied with a video signal from a corresponding one of said plurality of drain signal lines via said switching element driven by a scanning signal supplied from a corresponding one of said plurality of gate signal lines,
• said pixel electrode and said counter electrode being arranged so as to generate therebetween an electric field having a component parallel to said surface of said first substrate,
• wherein following inequalities are satisfied:
• (½)Cgs-s≦Cgs-n≦2Cgs-s, and (½)Cgc-s≦Cgc-n≦2Cgc-s,
• where
• Cgs-s is a capacitance formed between said pixel electrode and said corresponding one of said plurality of gate signal lines,
• Cgs-n is a capacitance formed between said pixel electrode and one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines,
• Cgc-s is a capacitance formed between said counter electrode and said corresponding one of said plurality of gate signal lines, and
• Cgc-n is a capacitance formed between said counter electrode and one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines.

A liquid crystal display device comprising:

• a pair of opposing substrates;
• a liquid crystal layer sandwiched between said pair of opposing substrates;
• a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of said pair of opposing substrates;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween;
• and
• a plurality of pixel areas each having a pixel electrode and a switching element, and surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode being configured so as to hold a video signal written thereinto from a corresponding one of said plurality of drain signal lines via said switching element driven by a scanning signal supplied from a corresponding one of said plurality of gate signal lines,
• wherein a following inequality is satisfied:
• |Vhb|≦|Vha|,
• where
• Vw is a voltage for writing said video signal into said pixel electrode when said scanning signal is applied to said corresponding one of said plurality of gate signal lines,
• Vh1 is a hold voltage held on said pixel electrode when a second scanning signal is applied to one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines,
• Vh2 is a hold voltage held on said pixel electrode after an end of said second scanning signal,
• |Vhb| is an absolute difference between Vw and Vh1, and
• |Vha| is an absolute difference between Vw and Vh2.

A liquid crystal display device comprising:

• a pair of opposing substrates;
• a liquid crystal layer sandwiched between said pair of opposing substrates;
• a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of said pair of opposing substrates;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween;
• and
• a plurality of pixel areas each having a pixel electrode and a thin film transistor, and surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode being supplied with a voltage Vs of a source electrode of said thin film transistor receiving a drain electrode voltage Vd from a corresponding one of said plurality of drain signal lines,
• said thin film transistor being driven by rise of a signal supplied from a corresponding one of said plurality of gate signal lines,
• wherein Vso is in a range of Vd±Vds,
• where
• Vs0=a voltage of said source electrode during a rising period of a second signal on one of said plurality of gate signal lines succeeding said corresponding one of gate signal lines, and
• Vds=a difference between said drain electrode voltage Vd and a voltage Vs1 of said source electrode after a rising period of said second signal.

A liquid crystal display device comprising:

• a pair of opposing substrates;
• a liquid crystal layer sandwiched between said pair of opposing substrates;
• a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of said pair of opposing substrates;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween;
• and
• a plurality of pixel areas each having a pixel electrode and a switching element, and surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode being supplied with a signal from a corresponding one of said plurality of drain signal lines via said switching element to be turned ON by a signal supplied from a corresponding one of said plurality of gate signal lines,
• wherein a following inequality is satisfied:
• Variation 1<Variation 2,
• where
• Variation 1=a difference between a voltage supplied to said pixel electrode when said switching element is ON and a voltage on said pixel electrode when a second signal is supplied to one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines, and
• Variation 2=a difference between said voltage supplied to said pixel electrode when said switching element is ON and a voltage on said pixel electrode after an end of said second signal.

A liquid crystal display device comprising:

• a pair of opposing substrates;
• a liquid crystal layer sandwiched between said pair of opposing substrates;
• a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of said pair of opposing substrates;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween;
• a plurality of pixel areas each having a pixel electrode, a counter electrode adjacent to said pixel electrode and a switching element, and surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode and said counter electrode being arranged so as to generate therebetween an electric field having a component parallel to said surface of said one of said pair of opposing substrates,
• said pixel electrode being supplied with a video signal from a corresponding one of said plurality of drain signal lines via said switching element driven by a scanning signal supplied from a corresponding one of said plurality of gate signal lines, and
• a pair of first and second counter-voltage signal lines for applying a voltage to said counter electrode,
• wherein at least one of said pixel electrodes has a portion overlying one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines, and an insulating layer is interposed between said at least one of said pixel electrodes and said one of said plurality of gate signal lines at said portion, and
• said pair of first and second counter-voltage signal lines are connected to ends of said counter electrode, respectively.

A liquid crystal display device comprising:

• a pair of opposing substrates;
• a liquid crystal layer sandwiched between said pair of opposing substrates;
• a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of said pair of opposing substrates;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween;
• and
• a plurality of pixel areas each having a pixel electrode, a counter electrode adjacent to said pixel electrode and a switching element, and surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode and said counter electrode being arranged so as to generate therebetween an electric field having a component parallel to said surface of said one of said pair of opposing substrates,
• said pixel electrode being supplied with a video signal from a corresponding one of said plurality of drain signal lines via said switching element driven by a scanning signal supplied from a corresponding one of said plurality of gate signal lines,
• wherein at least one of said pixel electrodes has a portion overlying one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines, and an insulating layer is interposed between said at least one of said pixel electrodes and said one of said plurality of gate signal lines at said portion, and each of said pixel electrode and said counter electrode has one bend or an odd number of bends more than one.

A liquid crystal display device comprising:

• a pair of opposing substrates;
• a liquid crystal layer sandwiched between said pair of opposing substrates;
• a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of said pair of opposing substrates;
• a plurality of drain signal lines disposed to intersect said plurality of gate signal lines with an insulating layer interposed therebetween;
• and
• a plurality of pixels each having a pixel electrode, a counter electrode adjacent to said pixel electrode and a switching element, and surrounded by two adjacent ones of said plurality of gate signal lines and two adjacent ones of said plurality of drain signal lines,
• said pixel electrode and said counter electrode being arranged so as to generate therebetween an electric field having a component parallel to said surface of said one of said pair of opposing substrates,
• said pixel electrode being supplied with a video signal from a corresponding one of said plurality of drain signal lines via said switching element driven by a scanning signal supplied from a corresponding one of said plurality of gate signal lines,
• wherein each of said pixel electrode and said counter electrode has a bend,
• each of said plurality of drain signal lines has a bend within each of said plurality of pixels, and
• at least one of said pixel electrodes has a portion overlying one of said plurality of gate signal lines succeeding said corresponding one of said plurality of gate signal lines, and an insulating layer is interposed between said at least one of said pixel electrodes and said one of said plurality of gate signal lines at said portion,

A liquid crystal display device comprising:

• a pair of opposing substrates;
• a liquid crystal layer sandwiched between said pair of opposing substrates;
• a plurality of scanning signal lines disposed on a liquid crystal layer side surface of one of said pair of opposing substrates;
• a plurality of video signal lines disposed to intersect said plurality of scanning signal lines with an insulating layer interposed therebetween;
• and
• a plurality of pixel areas each having a pixel electrode and a thin film transistor, and surrounded by two adjacent ones of said plurality of scanning signal lines and two adjacent ones of said plurality of video signal lines,
• a source electrode of said thin film transistor being connected to said pixel electrode,
• a drain electrode of said thin film transistor being connected to a corresponding one of said plurality of video signal lines,
• a gate electrode of said thin film transistor being connected to a corresponding one of said plurality of scanning signal lines,
• wherein a following inequality is satisfied:
• (½) Area A<Area C<2Area A,
• where
• said Area A is an area of a region A of said corresponding one of said plurality of scanning signal lines being overlaid with said source electrode,
• said Area B is an area of a region B of said corresponding one of said plurality of scanning signal lines being overlaid with said drain electrode, and
• said Area C is an area of a region C of said corresponding one of said plurality of scanning signal lines being overlaid with a pixel electrode corresponding to one of said plurality of scanning signal lines preceding said corresponding one of said plurality of scanning signal lines,
• said region A, said region B and said region C being spaced from one another.